MAYBE * Step 1: TrivialSCCs MAYBE + Considered Problem: Rules: 0. eval_speedFails4_start(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb0_in(v__,v__0,v_0,v_n,v_x) True (1,1) 1. eval_speedFails4_bb0_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_1(v__,v__0,nondef_0,v_n,v_x) True (?,1) 2. eval_speedFails4_1(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_2(v__,v__0,v_0,v_n,v_x) True (?,1) 3. eval_speedFails4_2(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_3(v__,v__0,v_0,v_n,v_x) True (?,1) 4. eval_speedFails4_3(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) True (?,1) 5. eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_5(1,v__0,v_0,v_n,v_x) [v_0 >= 1] (?,1) 6. eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_5(-1,v__0,v_0,v_n,v_x) [0 >= v_0] (?,1) 7. eval_speedFails4_5(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_6(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) 8. eval_speedFails4_6(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_7(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) 9. eval_speedFails4_7(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,v_x,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) 10. eval_speedFails4_bb1_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0 && v_n >= v__0] (?,1) 11. eval_speedFails4_bb1_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb3_in(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0 && -1 + v__0 >= v_n] (?,1) 12. eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,v__ + v__0,v_0,v_n,v_x) [-1*v__0 + v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0 && v_0 >= 1] (?,1) 13. eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,-1*v__ + v__0,v_0,v_n,v_x) [-1*v__0 + v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0 && 0 >= v_0] (?,1) 14. eval_speedFails4_bb3_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_stop(v__,v__0,v_0,v_n,v_x) [-1 + v__0 + -1*v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) Signature: {(eval_speedFails4_1,5) ;(eval_speedFails4_2,5) ;(eval_speedFails4_3,5) ;(eval_speedFails4_4,5) ;(eval_speedFails4_5,5) ;(eval_speedFails4_6,5) ;(eval_speedFails4_7,5) ;(eval_speedFails4_bb0_in,5) ;(eval_speedFails4_bb1_in,5) ;(eval_speedFails4_bb2_in,5) ;(eval_speedFails4_bb3_in,5) ;(eval_speedFails4_start,5) ;(eval_speedFails4_stop,5)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5,6},5->{7},6->{7},7->{8},8->{9},9->{10,11},10->{12,13},11->{14},12->{10 ,11},13->{10,11},14->{}] + Applied Processor: TrivialSCCs + Details: All trivial SCCs of the transition graph admit timebound 1. * Step 2: AddSinks MAYBE + Considered Problem: Rules: 0. eval_speedFails4_start(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb0_in(v__,v__0,v_0,v_n,v_x) True (1,1) 1. eval_speedFails4_bb0_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_1(v__,v__0,nondef_0,v_n,v_x) True (1,1) 2. eval_speedFails4_1(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_2(v__,v__0,v_0,v_n,v_x) True (1,1) 3. eval_speedFails4_2(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_3(v__,v__0,v_0,v_n,v_x) True (1,1) 4. eval_speedFails4_3(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) True (1,1) 5. eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_5(1,v__0,v_0,v_n,v_x) [v_0 >= 1] (1,1) 6. eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_5(-1,v__0,v_0,v_n,v_x) [0 >= v_0] (1,1) 7. eval_speedFails4_5(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_6(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (1,1) 8. eval_speedFails4_6(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_7(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (1,1) 9. eval_speedFails4_7(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,v_x,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (1,1) 10. eval_speedFails4_bb1_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0 && v_n >= v__0] (?,1) 11. eval_speedFails4_bb1_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb3_in(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0 && -1 + v__0 >= v_n] (1,1) 12. eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,v__ + v__0,v_0,v_n,v_x) [-1*v__0 + v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0 && v_0 >= 1] (?,1) 13. eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,-1*v__ + v__0,v_0,v_n,v_x) [-1*v__0 + v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0 && 0 >= v_0] (?,1) 14. eval_speedFails4_bb3_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_stop(v__,v__0,v_0,v_n,v_x) [-1 + v__0 + -1*v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0] (1,1) Signature: {(eval_speedFails4_1,5) ;(eval_speedFails4_2,5) ;(eval_speedFails4_3,5) ;(eval_speedFails4_4,5) ;(eval_speedFails4_5,5) ;(eval_speedFails4_6,5) ;(eval_speedFails4_7,5) ;(eval_speedFails4_bb0_in,5) ;(eval_speedFails4_bb1_in,5) ;(eval_speedFails4_bb2_in,5) ;(eval_speedFails4_bb3_in,5) ;(eval_speedFails4_start,5) ;(eval_speedFails4_stop,5)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5,6},5->{7},6->{7},7->{8},8->{9},9->{10,11},10->{12,13},11->{14},12->{10 ,11},13->{10,11},14->{}] + Applied Processor: AddSinks + Details: () * Step 3: Failure MAYBE + Considered Problem: Rules: 0. eval_speedFails4_start(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb0_in(v__,v__0,v_0,v_n,v_x) True (1,1) 1. eval_speedFails4_bb0_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_1(v__,v__0,nondef_0,v_n,v_x) True (?,1) 2. eval_speedFails4_1(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_2(v__,v__0,v_0,v_n,v_x) True (?,1) 3. eval_speedFails4_2(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_3(v__,v__0,v_0,v_n,v_x) True (?,1) 4. eval_speedFails4_3(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) True (?,1) 5. eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_5(1,v__0,v_0,v_n,v_x) [v_0 >= 1] (?,1) 6. eval_speedFails4_4(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_5(-1,v__0,v_0,v_n,v_x) [0 >= v_0] (?,1) 7. eval_speedFails4_5(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_6(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) 8. eval_speedFails4_6(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_7(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) 9. eval_speedFails4_7(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,v_x,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) 10. eval_speedFails4_bb1_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0 && v_n >= v__0] (?,1) 11. eval_speedFails4_bb1_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb3_in(v__,v__0,v_0,v_n,v_x) [1 + -1*v__ >= 0 && 1 + v__ >= 0 && -1 + v__0 >= v_n] (?,1) 12. eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,v__ + v__0,v_0,v_n,v_x) [-1*v__0 + v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0 && v_0 >= 1] (?,1) 13. eval_speedFails4_bb2_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_bb1_in(v__,-1*v__ + v__0,v_0,v_n,v_x) [-1*v__0 + v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0 && 0 >= v_0] (?,1) 14. eval_speedFails4_bb3_in(v__,v__0,v_0,v_n,v_x) -> eval_speedFails4_stop(v__,v__0,v_0,v_n,v_x) [-1 + v__0 + -1*v_n >= 0 && 1 + -1*v__ >= 0 && 1 + v__ >= 0] (?,1) 15. eval_speedFails4_bb3_in(v__,v__0,v_0,v_n,v_x) -> exitus616(v__,v__0,v_0,v_n,v_x) True (?,1) Signature: {(eval_speedFails4_1,5) ;(eval_speedFails4_2,5) ;(eval_speedFails4_3,5) ;(eval_speedFails4_4,5) ;(eval_speedFails4_5,5) ;(eval_speedFails4_6,5) ;(eval_speedFails4_7,5) ;(eval_speedFails4_bb0_in,5) ;(eval_speedFails4_bb1_in,5) ;(eval_speedFails4_bb2_in,5) ;(eval_speedFails4_bb3_in,5) ;(eval_speedFails4_start,5) ;(eval_speedFails4_stop,5) ;(exitus616,5)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5,6},5->{7},6->{7},7->{8},8->{9},9->{10,11},10->{12,13},11->{14,15} ,12->{10,11},13->{10,11},14->{},15->{}] + Applied Processor: LooptreeTransformer + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] | `- p:[10,12,13] c: [] MAYBE