MAYBE * Step 1: TrivialSCCs MAYBE + Considered Problem: Rules: 0. eval_speedFails1_start(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb0_in(v__0,v_i,v_m,v_n) True (1,1) 1. eval_speedFails1_bb0_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_0(v__0,v_i,v_m,v_n) True (?,1) 2. eval_speedFails1_0(v__0,v_i,v_m,v_n) -> eval_speedFails1_1(v__0,v_i,v_m,v_n) True (?,1) 3. eval_speedFails1_1(v__0,v_i,v_m,v_n) -> eval_speedFails1_2(v__0,v_i,v_m,v_n) True (?,1) 4. eval_speedFails1_2(v__0,v_i,v_m,v_n) -> eval_speedFails1_3(v__0,v_i,v_m,v_n) True (?,1) 5. eval_speedFails1_3(v__0,v_i,v_m,v_n) -> eval_speedFails1_4(v__0,v_i,v_m,v_n) True (?,1) 6. eval_speedFails1_4(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb1_in(v_i,v_i,v_m,v_n) True (?,1) 7. eval_speedFails1_bb1_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb2_in(v__0,v_i,v_m,v_n) [v_n >= v__0] (?,1) 8. eval_speedFails1_bb1_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb3_in(v__0,v_i,v_m,v_n) [-1 + v__0 >= v_n] (?,1) 9. eval_speedFails1_bb2_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb1_in(v__0 + v_m,v_i,v_m,v_n) [-1*v__0 + v_n >= 0] (?,1) 10. eval_speedFails1_bb3_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_stop(v__0,v_i,v_m,v_n) [-1 + v__0 + -1*v_n >= 0] (?,1) Signature: {(eval_speedFails1_0,4) ;(eval_speedFails1_1,4) ;(eval_speedFails1_2,4) ;(eval_speedFails1_3,4) ;(eval_speedFails1_4,4) ;(eval_speedFails1_bb0_in,4) ;(eval_speedFails1_bb1_in,4) ;(eval_speedFails1_bb2_in,4) ;(eval_speedFails1_bb3_in,4) ;(eval_speedFails1_start,4) ;(eval_speedFails1_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7,8},7->{9},8->{10},9->{7,8},10->{}] + Applied Processor: TrivialSCCs + Details: All trivial SCCs of the transition graph admit timebound 1. * Step 2: AddSinks MAYBE + Considered Problem: Rules: 0. eval_speedFails1_start(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb0_in(v__0,v_i,v_m,v_n) True (1,1) 1. eval_speedFails1_bb0_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_0(v__0,v_i,v_m,v_n) True (1,1) 2. eval_speedFails1_0(v__0,v_i,v_m,v_n) -> eval_speedFails1_1(v__0,v_i,v_m,v_n) True (1,1) 3. eval_speedFails1_1(v__0,v_i,v_m,v_n) -> eval_speedFails1_2(v__0,v_i,v_m,v_n) True (1,1) 4. eval_speedFails1_2(v__0,v_i,v_m,v_n) -> eval_speedFails1_3(v__0,v_i,v_m,v_n) True (1,1) 5. eval_speedFails1_3(v__0,v_i,v_m,v_n) -> eval_speedFails1_4(v__0,v_i,v_m,v_n) True (1,1) 6. eval_speedFails1_4(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb1_in(v_i,v_i,v_m,v_n) True (1,1) 7. eval_speedFails1_bb1_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb2_in(v__0,v_i,v_m,v_n) [v_n >= v__0] (?,1) 8. eval_speedFails1_bb1_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb3_in(v__0,v_i,v_m,v_n) [-1 + v__0 >= v_n] (1,1) 9. eval_speedFails1_bb2_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb1_in(v__0 + v_m,v_i,v_m,v_n) [-1*v__0 + v_n >= 0] (?,1) 10. eval_speedFails1_bb3_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_stop(v__0,v_i,v_m,v_n) [-1 + v__0 + -1*v_n >= 0] (1,1) Signature: {(eval_speedFails1_0,4) ;(eval_speedFails1_1,4) ;(eval_speedFails1_2,4) ;(eval_speedFails1_3,4) ;(eval_speedFails1_4,4) ;(eval_speedFails1_bb0_in,4) ;(eval_speedFails1_bb1_in,4) ;(eval_speedFails1_bb2_in,4) ;(eval_speedFails1_bb3_in,4) ;(eval_speedFails1_start,4) ;(eval_speedFails1_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7,8},7->{9},8->{10},9->{7,8},10->{}] + Applied Processor: AddSinks + Details: () * Step 3: Failure MAYBE + Considered Problem: Rules: 0. eval_speedFails1_start(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb0_in(v__0,v_i,v_m,v_n) True (1,1) 1. eval_speedFails1_bb0_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_0(v__0,v_i,v_m,v_n) True (?,1) 2. eval_speedFails1_0(v__0,v_i,v_m,v_n) -> eval_speedFails1_1(v__0,v_i,v_m,v_n) True (?,1) 3. eval_speedFails1_1(v__0,v_i,v_m,v_n) -> eval_speedFails1_2(v__0,v_i,v_m,v_n) True (?,1) 4. eval_speedFails1_2(v__0,v_i,v_m,v_n) -> eval_speedFails1_3(v__0,v_i,v_m,v_n) True (?,1) 5. eval_speedFails1_3(v__0,v_i,v_m,v_n) -> eval_speedFails1_4(v__0,v_i,v_m,v_n) True (?,1) 6. eval_speedFails1_4(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb1_in(v_i,v_i,v_m,v_n) True (?,1) 7. eval_speedFails1_bb1_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb2_in(v__0,v_i,v_m,v_n) [v_n >= v__0] (?,1) 8. eval_speedFails1_bb1_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb3_in(v__0,v_i,v_m,v_n) [-1 + v__0 >= v_n] (?,1) 9. eval_speedFails1_bb2_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_bb1_in(v__0 + v_m,v_i,v_m,v_n) [-1*v__0 + v_n >= 0] (?,1) 10. eval_speedFails1_bb3_in(v__0,v_i,v_m,v_n) -> eval_speedFails1_stop(v__0,v_i,v_m,v_n) [-1 + v__0 + -1*v_n >= 0] (?,1) 11. eval_speedFails1_bb3_in(v__0,v_i,v_m,v_n) -> exitus616(v__0,v_i,v_m,v_n) True (?,1) Signature: {(eval_speedFails1_0,4) ;(eval_speedFails1_1,4) ;(eval_speedFails1_2,4) ;(eval_speedFails1_3,4) ;(eval_speedFails1_4,4) ;(eval_speedFails1_bb0_in,4) ;(eval_speedFails1_bb1_in,4) ;(eval_speedFails1_bb2_in,4) ;(eval_speedFails1_bb3_in,4) ;(eval_speedFails1_start,4) ;(eval_speedFails1_stop,4) ;(exitus616,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7,8},7->{9},8->{10,11},9->{7,8},10->{},11->{}] + Applied Processor: LooptreeTransformer + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11] | `- p:[7,9] c: [] MAYBE