YES(?,POLY) * Step 1: TrivialSCCs WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_ax_start(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 1. eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 2. eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 3. eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 4. eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 5. eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 6. eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 7. eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 8. eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(0,v__01,v_3,v_i,v_j,v_n) True (?,1) 9. eval_ax_bb1_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,0,v_3,v_i,v_j,v_n) [v__0 >= 0] (?,1) 10. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && -2 + v_n >= v__01] (?,1) 11. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n] (?,1) 12. eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,1 + v__01,v_3,v_i,v_j,v_n) [-2 + v_n >= 0 (?,1) && -2 + v__01 + v_n >= 0 && -2 + -1*v__01 + v_n >= 0 && -2 + v__0 + v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 13. eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_12(v__0,v__01,1 + v__0,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] (?,1) 14. eval_ax_12(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 15. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(v_3,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n && -2 + v_n >= v_3] 16. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v_3 >= -1 + v_n] 17. eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_stop(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v_3 + -1*v_n >= 0 (?,1) && 1 + v__01 + -1*v_n >= 0 && 2 + v__0 + -1*v_n >= 0 && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] Signature: {(eval_ax_0,6) ;(eval_ax_1,6) ;(eval_ax_12,6) ;(eval_ax_13,6) ;(eval_ax_2,6) ;(eval_ax_3,6) ;(eval_ax_4,6) ;(eval_ax_5,6) ;(eval_ax_6,6) ;(eval_ax_bb0_in,6) ;(eval_ax_bb1_in,6) ;(eval_ax_bb2_in,6) ;(eval_ax_bb3_in,6) ;(eval_ax_bb4_in,6) ;(eval_ax_bb5_in,6) ;(eval_ax_start,6) ;(eval_ax_stop,6)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9},9->{10,11},10->{12},11->{13},12->{10,11} ,13->{14},14->{15,16},15->{9},16->{17},17->{}] + Applied Processor: TrivialSCCs + Details: All trivial SCCs of the transition graph admit timebound 1. * Step 2: AddSinks WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_ax_start(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 1. eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 2. eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 3. eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 4. eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 5. eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 6. eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 7. eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 8. eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(0,v__01,v_3,v_i,v_j,v_n) True (1,1) 9. eval_ax_bb1_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,0,v_3,v_i,v_j,v_n) [v__0 >= 0] (?,1) 10. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && -2 + v_n >= v__01] (?,1) 11. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n] (?,1) 12. eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,1 + v__01,v_3,v_i,v_j,v_n) [-2 + v_n >= 0 (?,1) && -2 + v__01 + v_n >= 0 && -2 + -1*v__01 + v_n >= 0 && -2 + v__0 + v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 13. eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_12(v__0,v__01,1 + v__0,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] (?,1) 14. eval_ax_12(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 15. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(v_3,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n && -2 + v_n >= v_3] 16. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (1,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v_3 >= -1 + v_n] 17. eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_stop(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v_3 + -1*v_n >= 0 (1,1) && 1 + v__01 + -1*v_n >= 0 && 2 + v__0 + -1*v_n >= 0 && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] Signature: {(eval_ax_0,6) ;(eval_ax_1,6) ;(eval_ax_12,6) ;(eval_ax_13,6) ;(eval_ax_2,6) ;(eval_ax_3,6) ;(eval_ax_4,6) ;(eval_ax_5,6) ;(eval_ax_6,6) ;(eval_ax_bb0_in,6) ;(eval_ax_bb1_in,6) ;(eval_ax_bb2_in,6) ;(eval_ax_bb3_in,6) ;(eval_ax_bb4_in,6) ;(eval_ax_bb5_in,6) ;(eval_ax_start,6) ;(eval_ax_stop,6)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9},9->{10,11},10->{12},11->{13},12->{10,11} ,13->{14},14->{15,16},15->{9},16->{17},17->{}] + Applied Processor: AddSinks + Details: () * Step 3: LooptreeTransformer WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_ax_start(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 1. eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 2. eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 3. eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 4. eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 5. eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 6. eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 7. eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 8. eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(0,v__01,v_3,v_i,v_j,v_n) True (?,1) 9. eval_ax_bb1_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,0,v_3,v_i,v_j,v_n) [v__0 >= 0] (?,1) 10. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && -2 + v_n >= v__01] (?,1) 11. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n] (?,1) 12. eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,1 + v__01,v_3,v_i,v_j,v_n) [-2 + v_n >= 0 (?,1) && -2 + v__01 + v_n >= 0 && -2 + -1*v__01 + v_n >= 0 && -2 + v__0 + v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 13. eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_12(v__0,v__01,1 + v__0,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] (?,1) 14. eval_ax_12(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 15. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(v_3,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n && -2 + v_n >= v_3] 16. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v_3 >= -1 + v_n] 17. eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_stop(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v_3 + -1*v_n >= 0 (?,1) && 1 + v__01 + -1*v_n >= 0 && 2 + v__0 + -1*v_n >= 0 && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 18. eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) -> exitus616(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) Signature: {(eval_ax_0,6) ;(eval_ax_1,6) ;(eval_ax_12,6) ;(eval_ax_13,6) ;(eval_ax_2,6) ;(eval_ax_3,6) ;(eval_ax_4,6) ;(eval_ax_5,6) ;(eval_ax_6,6) ;(eval_ax_bb0_in,6) ;(eval_ax_bb1_in,6) ;(eval_ax_bb2_in,6) ;(eval_ax_bb3_in,6) ;(eval_ax_bb4_in,6) ;(eval_ax_bb5_in,6) ;(eval_ax_start,6) ;(eval_ax_stop,6) ;(exitus616,6)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9},9->{10,11},10->{12},11->{13},12->{10,11} ,13->{14},14->{15,16},15->{9},16->{17,18},17->{},18->{}] + Applied Processor: LooptreeTransformer + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18] | `- p:[9,15,14,13,11,12,10] c: [15] | `- p:[10,12] c: [12] * Step 4: SizeAbstraction WORST_CASE(?,POLY) + Considered Problem: (Rules: 0. eval_ax_start(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) True (1,1) 1. eval_ax_bb0_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 2. eval_ax_0(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 3. eval_ax_1(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 4. eval_ax_2(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 5. eval_ax_3(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 6. eval_ax_4(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 7. eval_ax_5(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) 8. eval_ax_6(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(0,v__01,v_3,v_i,v_j,v_n) True (?,1) 9. eval_ax_bb1_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,0,v_3,v_i,v_j,v_n) [v__0 >= 0] (?,1) 10. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && -2 + v_n >= v__01] (?,1) 11. eval_ax_bb2_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) [v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n] (?,1) 12. eval_ax_bb3_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb2_in(v__0,1 + v__01,v_3,v_i,v_j,v_n) [-2 + v_n >= 0 (?,1) && -2 + v__01 + v_n >= 0 && -2 + -1*v__01 + v_n >= 0 && -2 + v__0 + v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 13. eval_ax_bb4_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_12(v__0,v__01,1 + v__0,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] (?,1) 14. eval_ax_12(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 15. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb1_in(v_3,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v__01 >= -1 + v_n && -2 + v_n >= v_3] 16. eval_ax_13(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v__01 + -1*v_n >= 0 (?,1) && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0 && v_3 >= -1 + v_n] 17. eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) -> eval_ax_stop(v__0,v__01,v_3,v_i,v_j,v_n) [1 + v_3 + -1*v_n >= 0 (?,1) && 1 + v__01 + -1*v_n >= 0 && 2 + v__0 + -1*v_n >= 0 && 1 + -1*v_3 + v__0 >= 0 && -1 + v_3 >= 0 && -1 + v_3 + v__01 >= 0 && -1 + v_3 + v__0 >= 0 && -1 + v_3 + -1*v__0 >= 0 && v__01 >= 0 && v__0 + v__01 >= 0 && v__0 >= 0] 18. eval_ax_bb5_in(v__0,v__01,v_3,v_i,v_j,v_n) -> exitus616(v__0,v__01,v_3,v_i,v_j,v_n) True (?,1) Signature: {(eval_ax_0,6) ;(eval_ax_1,6) ;(eval_ax_12,6) ;(eval_ax_13,6) ;(eval_ax_2,6) ;(eval_ax_3,6) ;(eval_ax_4,6) ;(eval_ax_5,6) ;(eval_ax_6,6) ;(eval_ax_bb0_in,6) ;(eval_ax_bb1_in,6) ;(eval_ax_bb2_in,6) ;(eval_ax_bb3_in,6) ;(eval_ax_bb4_in,6) ;(eval_ax_bb5_in,6) ;(eval_ax_start,6) ;(eval_ax_stop,6) ;(exitus616,6)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9},9->{10,11},10->{12},11->{13},12->{10,11} ,13->{14},14->{15,16},15->{9},16->{17,18},17->{},18->{}] ,We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18] | `- p:[9,15,14,13,11,12,10] c: [15] | `- p:[10,12] c: [12]) + Applied Processor: SizeAbstraction UseCFG Minimize + Details: () * Step 5: FlowAbstraction WORST_CASE(?,POLY) + Considered Problem: Program: Domain: [v__0,v__01,v_3,v_i,v_j,v_n,0.0,0.0.0] eval_ax_start ~> eval_ax_bb0_in [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb0_in ~> eval_ax_0 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_0 ~> eval_ax_1 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_1 ~> eval_ax_2 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_2 ~> eval_ax_3 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_3 ~> eval_ax_4 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_4 ~> eval_ax_5 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_5 ~> eval_ax_6 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_6 ~> eval_ax_bb1_in [v__0 <= 0*K, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb1_in ~> eval_ax_bb2_in [v__0 <= v__0, v__01 <= 0*K, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb2_in ~> eval_ax_bb3_in [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb2_in ~> eval_ax_bb4_in [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb3_in ~> eval_ax_bb2_in [v__0 <= v__0, v__01 <= v_n, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb4_in ~> eval_ax_12 [v__0 <= v__0, v__01 <= v__01, v_3 <= K + v__0, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_12 ~> eval_ax_13 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_13 ~> eval_ax_bb1_in [v__0 <= v_3, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_13 ~> eval_ax_bb5_in [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb5_in ~> eval_ax_stop [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb5_in ~> exitus616 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] + Loop: [0.0 <= 2*K + v_3 + v__0 + v_n] eval_ax_bb1_in ~> eval_ax_bb2_in [v__0 <= v__0, v__01 <= 0*K, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_13 ~> eval_ax_bb1_in [v__0 <= v_3, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_12 ~> eval_ax_13 [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb4_in ~> eval_ax_12 [v__0 <= v__0, v__01 <= v__01, v_3 <= K + v__0, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb2_in ~> eval_ax_bb4_in [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb3_in ~> eval_ax_bb2_in [v__0 <= v__0, v__01 <= v_n, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb2_in ~> eval_ax_bb3_in [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] + Loop: [0.0.0 <= K + v__01 + v_n] eval_ax_bb2_in ~> eval_ax_bb3_in [v__0 <= v__0, v__01 <= v__01, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] eval_ax_bb3_in ~> eval_ax_bb2_in [v__0 <= v__0, v__01 <= v_n, v_3 <= v_3, v_i <= v_i, v_j <= v_j, v_n <= v_n] + Applied Processor: FlowAbstraction + Details: () * Step 6: LareProcessor WORST_CASE(?,POLY) + Considered Problem: Program: Domain: [tick,huge,K,v__0,v__01,v_3,v_i,v_j,v_n,0.0,0.0.0] eval_ax_start ~> eval_ax_bb0_in [] eval_ax_bb0_in ~> eval_ax_0 [] eval_ax_0 ~> eval_ax_1 [] eval_ax_1 ~> eval_ax_2 [] eval_ax_2 ~> eval_ax_3 [] eval_ax_3 ~> eval_ax_4 [] eval_ax_4 ~> eval_ax_5 [] eval_ax_5 ~> eval_ax_6 [] eval_ax_6 ~> eval_ax_bb1_in [K ~=> v__0] eval_ax_bb1_in ~> eval_ax_bb2_in [K ~=> v__01] eval_ax_bb2_in ~> eval_ax_bb3_in [] eval_ax_bb2_in ~> eval_ax_bb4_in [] eval_ax_bb3_in ~> eval_ax_bb2_in [v_n ~=> v__01] eval_ax_bb4_in ~> eval_ax_12 [v__0 ~+> v_3,K ~+> v_3] eval_ax_12 ~> eval_ax_13 [] eval_ax_13 ~> eval_ax_bb1_in [v_3 ~=> v__0] eval_ax_13 ~> eval_ax_bb5_in [] eval_ax_bb5_in ~> eval_ax_stop [] eval_ax_bb5_in ~> exitus616 [] + Loop: [v_3 ~+> 0.0,v__0 ~+> 0.0,v_n ~+> 0.0,K ~*> 0.0] eval_ax_bb1_in ~> eval_ax_bb2_in [K ~=> v__01] eval_ax_13 ~> eval_ax_bb1_in [v_3 ~=> v__0] eval_ax_12 ~> eval_ax_13 [] eval_ax_bb4_in ~> eval_ax_12 [v__0 ~+> v_3,K ~+> v_3] eval_ax_bb2_in ~> eval_ax_bb4_in [] eval_ax_bb3_in ~> eval_ax_bb2_in [v_n ~=> v__01] eval_ax_bb2_in ~> eval_ax_bb3_in [] + Loop: [v__01 ~+> 0.0.0,v_n ~+> 0.0.0,K ~+> 0.0.0] eval_ax_bb2_in ~> eval_ax_bb3_in [] eval_ax_bb3_in ~> eval_ax_bb2_in [v_n ~=> v__01] + Applied Processor: LareProcessor + Details: eval_ax_start ~> exitus616 [v_3 ~=> v__0 ,v_n ~=> v__01 ,K ~=> v__0 ,K ~=> v__01 ,v_3 ~+> v_3 ,v_3 ~+> v__0 ,v_3 ~+> 0.0 ,v_3 ~+> tick ,v_n ~+> 0.0 ,v_n ~+> 0.0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> v_3 ,K ~+> v__0 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_3 ~*> v_3 ,v_3 ~*> v__0 ,v_3 ~*> tick ,v_n ~*> v_3 ,v_n ~*> v__0 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,K ~*> v_3 ,K ~*> v__0 ,K ~*> 0.0 ,K ~*> 0.0.0 ,K ~*> tick] eval_ax_start ~> eval_ax_stop [v_3 ~=> v__0 ,v_n ~=> v__01 ,K ~=> v__0 ,K ~=> v__01 ,v_3 ~+> v_3 ,v_3 ~+> v__0 ,v_3 ~+> 0.0 ,v_3 ~+> tick ,v_n ~+> 0.0 ,v_n ~+> 0.0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> v_3 ,K ~+> v__0 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_3 ~*> v_3 ,v_3 ~*> v__0 ,v_3 ~*> tick ,v_n ~*> v_3 ,v_n ~*> v__0 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,K ~*> v_3 ,K ~*> v__0 ,K ~*> 0.0 ,K ~*> 0.0.0 ,K ~*> tick] + eval_ax_13> [v_3 ~=> v__0 ,v_n ~=> v__01 ,K ~=> v__01 ,v_3 ~+> v_3 ,v_3 ~+> v__0 ,v_3 ~+> 0.0 ,v_3 ~+> tick ,v__0 ~+> v_3 ,v__0 ~+> v__0 ,v__0 ~+> 0.0 ,v__0 ~+> tick ,v_n ~+> 0.0 ,v_n ~+> 0.0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> v_3 ,K ~+> v__0 ,K ~+> 0.0.0 ,K ~+> tick ,v_3 ~*> v_3 ,v_3 ~*> v__0 ,v_3 ~*> tick ,v__0 ~*> v_3 ,v__0 ~*> v__0 ,v__0 ~*> tick ,v_n ~*> v_3 ,v_n ~*> v__0 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,K ~*> v_3 ,K ~*> v__0 ,K ~*> 0.0 ,K ~*> 0.0.0 ,K ~*> tick] + eval_ax_bb2_in> [v_n ~=> v__01 ,v__01 ~+> 0.0.0 ,v__01 ~+> tick ,v_n ~+> 0.0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> 0.0.0 ,K ~+> tick] YES(?,POLY)