YES(?,POLY) * Step 1: TrivialSCCs WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_wise_start(v__0,v__01,v_x,v_y) -> eval_wise_bb0_in(v__0,v__01,v_x,v_y) True (1,1) 1. eval_wise_bb0_in(v__0,v__01,v_x,v_y) -> eval_wise_0(v__0,v__01,v_x,v_y) True (?,1) 2. eval_wise_0(v__0,v__01,v_x,v_y) -> eval_wise_1(v__0,v__01,v_x,v_y) True (?,1) 3. eval_wise_1(v__0,v__01,v_x,v_y) -> eval_wise_2(v__0,v__01,v_x,v_y) True (?,1) 4. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_x] (?,1) 5. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_y] (?,1) 6. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v_x,v_y,v_x,v_y) [v_x >= 0 && v_y >= 0] (?,1) 7. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + v__0 + -1*v__01 >= 2] (?,1) 8. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + -1*v__0 + v__01 >= 2] (?,1) 9. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [2 >= v__0 + -1*v__01 && 2 >= -1*v__0 + v__01] (?,1) 10. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && -1 + v__01 >= v__0] (?,1) 11. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && v__0 >= v__01] (?,1) 12. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && -1 + v__01 >= v__0] (?,1) 13. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && v__0 >= v__01] (?,1) 14. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> eval_wise_stop(v__0,v__01,v_x,v_y) True (?,1) Signature: {(eval_wise_0,4) ;(eval_wise_1,4) ;(eval_wise_2,4) ;(eval_wise__critedge_in,4) ;(eval_wise_bb0_in,4) ;(eval_wise_bb1_in,4) ;(eval_wise_bb2_in,4) ;(eval_wise_start,4) ;(eval_wise_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{14},5->{14},6->{7,8,9},7->{10,11,12,13},8->{10,11,12,13},9->{14} ,10->{7,8,9},11->{7,8,9},12->{7,8,9},13->{7,8,9},14->{}] + Applied Processor: TrivialSCCs + Details: All trivial SCCs of the transition graph admit timebound 1. * Step 2: UnsatRules WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_wise_start(v__0,v__01,v_x,v_y) -> eval_wise_bb0_in(v__0,v__01,v_x,v_y) True (1,1) 1. eval_wise_bb0_in(v__0,v__01,v_x,v_y) -> eval_wise_0(v__0,v__01,v_x,v_y) True (1,1) 2. eval_wise_0(v__0,v__01,v_x,v_y) -> eval_wise_1(v__0,v__01,v_x,v_y) True (1,1) 3. eval_wise_1(v__0,v__01,v_x,v_y) -> eval_wise_2(v__0,v__01,v_x,v_y) True (1,1) 4. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_x] (1,1) 5. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_y] (1,1) 6. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v_x,v_y,v_x,v_y) [v_x >= 0 && v_y >= 0] (1,1) 7. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + v__0 + -1*v__01 >= 2] (?,1) 8. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + -1*v__0 + v__01 >= 2] (?,1) 9. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [2 >= v__0 + -1*v__01 && 2 >= -1*v__0 + v__01] (1,1) 10. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && -1 + v__01 >= v__0] (?,1) 11. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && v__0 >= v__01] (?,1) 12. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && -1 + v__01 >= v__0] (?,1) 13. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && v__0 >= v__01] (?,1) 14. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> eval_wise_stop(v__0,v__01,v_x,v_y) True (1,1) Signature: {(eval_wise_0,4) ;(eval_wise_1,4) ;(eval_wise_2,4) ;(eval_wise__critedge_in,4) ;(eval_wise_bb0_in,4) ;(eval_wise_bb1_in,4) ;(eval_wise_bb2_in,4) ;(eval_wise_start,4) ;(eval_wise_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{14},5->{14},6->{7,8,9},7->{10,11,12,13},8->{10,11,12,13},9->{14} ,10->{7,8,9},11->{7,8,9},12->{7,8,9},13->{7,8,9},14->{}] + Applied Processor: UnsatRules + Details: Following transitions have unsatisfiable constraints and are removed: [11,12] * Step 3: UnsatPaths WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_wise_start(v__0,v__01,v_x,v_y) -> eval_wise_bb0_in(v__0,v__01,v_x,v_y) True (1,1) 1. eval_wise_bb0_in(v__0,v__01,v_x,v_y) -> eval_wise_0(v__0,v__01,v_x,v_y) True (1,1) 2. eval_wise_0(v__0,v__01,v_x,v_y) -> eval_wise_1(v__0,v__01,v_x,v_y) True (1,1) 3. eval_wise_1(v__0,v__01,v_x,v_y) -> eval_wise_2(v__0,v__01,v_x,v_y) True (1,1) 4. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_x] (1,1) 5. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_y] (1,1) 6. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v_x,v_y,v_x,v_y) [v_x >= 0 && v_y >= 0] (1,1) 7. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + v__0 + -1*v__01 >= 2] (?,1) 8. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + -1*v__0 + v__01 >= 2] (?,1) 9. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [2 >= v__0 + -1*v__01 && 2 >= -1*v__0 + v__01] (1,1) 10. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && -1 + v__01 >= v__0] (?,1) 13. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && v__0 >= v__01] (?,1) 14. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> eval_wise_stop(v__0,v__01,v_x,v_y) True (1,1) Signature: {(eval_wise_0,4) ;(eval_wise_1,4) ;(eval_wise_2,4) ;(eval_wise__critedge_in,4) ;(eval_wise_bb0_in,4) ;(eval_wise_bb1_in,4) ;(eval_wise_bb2_in,4) ;(eval_wise_start,4) ;(eval_wise_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{14},5->{14},6->{7,8,9},7->{10,13},8->{10,13},9->{14},10->{7,8,9} ,13->{7,8,9},14->{}] + Applied Processor: UnsatPaths + Details: We remove following edges from the transition graph: [(7,10),(8,13),(10,7),(13,8)] * Step 4: AddSinks WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_wise_start(v__0,v__01,v_x,v_y) -> eval_wise_bb0_in(v__0,v__01,v_x,v_y) True (1,1) 1. eval_wise_bb0_in(v__0,v__01,v_x,v_y) -> eval_wise_0(v__0,v__01,v_x,v_y) True (1,1) 2. eval_wise_0(v__0,v__01,v_x,v_y) -> eval_wise_1(v__0,v__01,v_x,v_y) True (1,1) 3. eval_wise_1(v__0,v__01,v_x,v_y) -> eval_wise_2(v__0,v__01,v_x,v_y) True (1,1) 4. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_x] (1,1) 5. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_y] (1,1) 6. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v_x,v_y,v_x,v_y) [v_x >= 0 && v_y >= 0] (1,1) 7. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + v__0 + -1*v__01 >= 2] (?,1) 8. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + -1*v__0 + v__01 >= 2] (?,1) 9. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [2 >= v__0 + -1*v__01 && 2 >= -1*v__0 + v__01] (1,1) 10. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && -1 + v__01 >= v__0] (?,1) 13. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && v__0 >= v__01] (?,1) 14. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> eval_wise_stop(v__0,v__01,v_x,v_y) True (1,1) Signature: {(eval_wise_0,4) ;(eval_wise_1,4) ;(eval_wise_2,4) ;(eval_wise__critedge_in,4) ;(eval_wise_bb0_in,4) ;(eval_wise_bb1_in,4) ;(eval_wise_bb2_in,4) ;(eval_wise_start,4) ;(eval_wise_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{14},5->{14},6->{7,8,9},7->{13},8->{10},9->{14},10->{8,9},13->{7,9} ,14->{}] + Applied Processor: AddSinks + Details: () * Step 5: UnsatPaths WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_wise_start(v__0,v__01,v_x,v_y) -> eval_wise_bb0_in(v__0,v__01,v_x,v_y) True (1,1) 1. eval_wise_bb0_in(v__0,v__01,v_x,v_y) -> eval_wise_0(v__0,v__01,v_x,v_y) True (?,1) 2. eval_wise_0(v__0,v__01,v_x,v_y) -> eval_wise_1(v__0,v__01,v_x,v_y) True (?,1) 3. eval_wise_1(v__0,v__01,v_x,v_y) -> eval_wise_2(v__0,v__01,v_x,v_y) True (?,1) 4. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_x] (?,1) 5. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_y] (?,1) 6. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v_x,v_y,v_x,v_y) [v_x >= 0 && v_y >= 0] (?,1) 7. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + v__0 + -1*v__01 >= 2] (?,1) 8. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + -1*v__0 + v__01 >= 2] (?,1) 9. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [2 >= v__0 + -1*v__01 && 2 >= -1*v__0 + v__01] (?,1) 10. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && -1 + v__01 >= v__0] (?,1) 13. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && v__0 >= v__01] (?,1) 14. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> eval_wise_stop(v__0,v__01,v_x,v_y) True (?,1) 15. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> exitus616(v__0,v__01,v_x,v_y) True (?,1) Signature: {(eval_wise_0,4) ;(eval_wise_1,4) ;(eval_wise_2,4) ;(eval_wise__critedge_in,4) ;(eval_wise_bb0_in,4) ;(eval_wise_bb1_in,4) ;(eval_wise_bb2_in,4) ;(eval_wise_start,4) ;(eval_wise_stop,4) ;(exitus616,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{14,15},5->{14,15},6->{7,8,9},7->{10,13},8->{10,13},9->{14,15},10->{7 ,8,9},13->{7,8,9},14->{},15->{}] + Applied Processor: UnsatPaths + Details: We remove following edges from the transition graph: [(7,10),(8,13),(10,7),(13,8)] * Step 6: LooptreeTransformer WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_wise_start(v__0,v__01,v_x,v_y) -> eval_wise_bb0_in(v__0,v__01,v_x,v_y) True (1,1) 1. eval_wise_bb0_in(v__0,v__01,v_x,v_y) -> eval_wise_0(v__0,v__01,v_x,v_y) True (?,1) 2. eval_wise_0(v__0,v__01,v_x,v_y) -> eval_wise_1(v__0,v__01,v_x,v_y) True (?,1) 3. eval_wise_1(v__0,v__01,v_x,v_y) -> eval_wise_2(v__0,v__01,v_x,v_y) True (?,1) 4. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_x] (?,1) 5. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_y] (?,1) 6. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v_x,v_y,v_x,v_y) [v_x >= 0 && v_y >= 0] (?,1) 7. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + v__0 + -1*v__01 >= 2] (?,1) 8. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + -1*v__0 + v__01 >= 2] (?,1) 9. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [2 >= v__0 + -1*v__01 && 2 >= -1*v__0 + v__01] (?,1) 10. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && -1 + v__01 >= v__0] (?,1) 13. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && v__0 >= v__01] (?,1) 14. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> eval_wise_stop(v__0,v__01,v_x,v_y) True (?,1) 15. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> exitus616(v__0,v__01,v_x,v_y) True (?,1) Signature: {(eval_wise_0,4) ;(eval_wise_1,4) ;(eval_wise_2,4) ;(eval_wise__critedge_in,4) ;(eval_wise_bb0_in,4) ;(eval_wise_bb1_in,4) ;(eval_wise_bb2_in,4) ;(eval_wise_start,4) ;(eval_wise_stop,4) ;(exitus616,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{14,15},5->{14,15},6->{7,8,9},7->{13},8->{10},9->{14,15},10->{8,9} ,13->{7,9},14->{},15->{}] + Applied Processor: LooptreeTransformer + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,13,14,15] | +- p:[8,10] c: [10] | `- p:[7,13] c: [13] * Step 7: SizeAbstraction WORST_CASE(?,POLY) + Considered Problem: (Rules: 0. eval_wise_start(v__0,v__01,v_x,v_y) -> eval_wise_bb0_in(v__0,v__01,v_x,v_y) True (1,1) 1. eval_wise_bb0_in(v__0,v__01,v_x,v_y) -> eval_wise_0(v__0,v__01,v_x,v_y) True (?,1) 2. eval_wise_0(v__0,v__01,v_x,v_y) -> eval_wise_1(v__0,v__01,v_x,v_y) True (?,1) 3. eval_wise_1(v__0,v__01,v_x,v_y) -> eval_wise_2(v__0,v__01,v_x,v_y) True (?,1) 4. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_x] (?,1) 5. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [-1 >= v_y] (?,1) 6. eval_wise_2(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v_x,v_y,v_x,v_y) [v_x >= 0 && v_y >= 0] (?,1) 7. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + v__0 + -1*v__01 >= 2] (?,1) 8. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise__critedge_in(v__0,v__01,v_x,v_y) [-1 + -1*v__0 + v__01 >= 2] (?,1) 9. eval_wise_bb1_in(v__0,v__01,v_x,v_y) -> eval_wise_bb2_in(v__0,v__01,v_x,v_y) [2 >= v__0 + -1*v__01 && 2 >= -1*v__0 + v__01] (?,1) 10. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(1 + v__0,v__01,v_x,v_y) [-1 + v__01 >= v__0 && -1 + v__01 >= v__0] (?,1) 13. eval_wise__critedge_in(v__0,v__01,v_x,v_y) -> eval_wise_bb1_in(v__0,1 + v__01,v_x,v_y) [v__0 >= v__01 && v__0 >= v__01] (?,1) 14. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> eval_wise_stop(v__0,v__01,v_x,v_y) True (?,1) 15. eval_wise_bb2_in(v__0,v__01,v_x,v_y) -> exitus616(v__0,v__01,v_x,v_y) True (?,1) Signature: {(eval_wise_0,4) ;(eval_wise_1,4) ;(eval_wise_2,4) ;(eval_wise__critedge_in,4) ;(eval_wise_bb0_in,4) ;(eval_wise_bb1_in,4) ;(eval_wise_bb2_in,4) ;(eval_wise_start,4) ;(eval_wise_stop,4) ;(exitus616,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{14,15},5->{14,15},6->{7,8,9},7->{13},8->{10},9->{14,15},10->{8,9} ,13->{7,9},14->{},15->{}] ,We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,13,14,15] | +- p:[8,10] c: [10] | `- p:[7,13] c: [13]) + Applied Processor: SizeAbstraction UseCFG Minimize + Details: () * Step 8: FlowAbstraction WORST_CASE(?,POLY) + Considered Problem: Program: Domain: [v__0,v__01,v_x,v_y,0.0,0.1] eval_wise_start ~> eval_wise_bb0_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_bb0_in ~> eval_wise_0 [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_0 ~> eval_wise_1 [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_1 ~> eval_wise_2 [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_2 ~> eval_wise_bb2_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_2 ~> eval_wise_bb2_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_2 ~> eval_wise_bb1_in [v__0 <= v_x, v__01 <= v_y, v_x <= v_x, v_y <= v_y] eval_wise_bb1_in ~> eval_wise__critedge_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_bb1_in ~> eval_wise__critedge_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_bb1_in ~> eval_wise_bb2_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise__critedge_in ~> eval_wise_bb1_in [v__0 <= v__0 + v__01, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise__critedge_in ~> eval_wise_bb1_in [v__0 <= v__0, v__01 <= K + v__01, v_x <= v_x, v_y <= v_y] eval_wise_bb2_in ~> eval_wise_stop [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise_bb2_in ~> exitus616 [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] + Loop: [0.0 <= v__0 + v__01] eval_wise_bb1_in ~> eval_wise__critedge_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise__critedge_in ~> eval_wise_bb1_in [v__0 <= v__0 + v__01, v__01 <= v__01, v_x <= v_x, v_y <= v_y] + Loop: [0.1 <= K + v__0 + v__01] eval_wise_bb1_in ~> eval_wise__critedge_in [v__0 <= v__0, v__01 <= v__01, v_x <= v_x, v_y <= v_y] eval_wise__critedge_in ~> eval_wise_bb1_in [v__0 <= v__0, v__01 <= K + v__01, v_x <= v_x, v_y <= v_y] + Applied Processor: FlowAbstraction + Details: () * Step 9: LareProcessor WORST_CASE(?,POLY) + Considered Problem: Program: Domain: [tick,huge,K,v__0,v__01,v_x,v_y,0.0,0.1] eval_wise_start ~> eval_wise_bb0_in [] eval_wise_bb0_in ~> eval_wise_0 [] eval_wise_0 ~> eval_wise_1 [] eval_wise_1 ~> eval_wise_2 [] eval_wise_2 ~> eval_wise_bb2_in [] eval_wise_2 ~> eval_wise_bb2_in [] eval_wise_2 ~> eval_wise_bb1_in [v_x ~=> v__0,v_y ~=> v__01] eval_wise_bb1_in ~> eval_wise__critedge_in [] eval_wise_bb1_in ~> eval_wise__critedge_in [] eval_wise_bb1_in ~> eval_wise_bb2_in [] eval_wise__critedge_in ~> eval_wise_bb1_in [v__0 ~+> v__0,v__01 ~+> v__0] eval_wise__critedge_in ~> eval_wise_bb1_in [v__01 ~+> v__01,K ~+> v__01] eval_wise_bb2_in ~> eval_wise_stop [] eval_wise_bb2_in ~> exitus616 [] + Loop: [v__0 ~+> 0.0,v__01 ~+> 0.0] eval_wise_bb1_in ~> eval_wise__critedge_in [] eval_wise__critedge_in ~> eval_wise_bb1_in [v__0 ~+> v__0,v__01 ~+> v__0] + Loop: [v__0 ~+> 0.1,v__01 ~+> 0.1,K ~+> 0.1] eval_wise_bb1_in ~> eval_wise__critedge_in [] eval_wise__critedge_in ~> eval_wise_bb1_in [v__01 ~+> v__01,K ~+> v__01] + Applied Processor: LareProcessor + Details: eval_wise_start ~> eval_wise__critedge_in [v_x ~=> v__0 ,v_y ~=> v__01 ,v_x ~+> v__0 ,v_x ~+> 0.0 ,v_x ~+> 0.1 ,v_x ~+> tick ,v_y ~+> v__0 ,v_y ~+> v__01 ,v_y ~+> 0.0 ,v_y ~+> 0.1 ,v_y ~+> tick ,tick ~+> tick ,K ~+> v__0 ,K ~+> v__01 ,K ~+> 0.0 ,K ~+> 0.1 ,K ~+> tick ,v_x ~*> v__0 ,v_x ~*> v__01 ,v_x ~*> 0.0 ,v_x ~*> 0.1 ,v_x ~*> tick ,v_y ~*> v__0 ,v_y ~*> v__01 ,v_y ~*> 0.0 ,v_y ~*> 0.1 ,v_y ~*> tick ,K ~*> v__0 ,K ~*> v__01 ,K ~*> 0.0 ,K ~*> 0.1 ,K ~*> tick] eval_wise_start ~> exitus616 [v_x ~=> v__0 ,v_y ~=> v__01 ,v_x ~+> v__0 ,v_x ~+> 0.0 ,v_x ~+> 0.1 ,v_x ~+> tick ,v_y ~+> v__0 ,v_y ~+> v__01 ,v_y ~+> 0.0 ,v_y ~+> 0.1 ,v_y ~+> tick ,tick ~+> tick ,K ~+> v__01 ,K ~+> 0.1 ,K ~+> tick ,v_x ~*> v__0 ,v_x ~*> v__01 ,v_y ~*> v__0 ,v_y ~*> v__01 ,K ~*> v__01] eval_wise_start ~> eval_wise_stop [v_x ~=> v__0 ,v_y ~=> v__01 ,v_x ~+> v__0 ,v_x ~+> 0.0 ,v_x ~+> 0.1 ,v_x ~+> tick ,v_y ~+> v__0 ,v_y ~+> v__01 ,v_y ~+> 0.0 ,v_y ~+> 0.1 ,v_y ~+> tick ,tick ~+> tick ,K ~+> v__01 ,K ~+> 0.1 ,K ~+> tick ,v_x ~*> v__0 ,v_x ~*> v__01 ,v_y ~*> v__0 ,v_y ~*> v__01 ,K ~*> v__01] + eval_wise__critedge_in> [v__0 ~+> v__0 ,v__0 ~+> 0.0 ,v__0 ~+> tick ,v__01 ~+> v__0 ,v__01 ~+> 0.0 ,v__01 ~+> tick ,tick ~+> tick ,v__0 ~*> v__0 ,v__01 ~*> v__0] eval_wise_bb1_in> [v__0 ~+> v__0 ,v__0 ~+> 0.0 ,v__0 ~+> tick ,v__01 ~+> v__0 ,v__01 ~+> 0.0 ,v__01 ~+> tick ,tick ~+> tick ,v__0 ~*> v__0 ,v__01 ~*> v__0] + eval_wise__critedge_in> [v__0 ~+> 0.1 ,v__0 ~+> tick ,v__01 ~+> v__01 ,v__01 ~+> 0.1 ,v__01 ~+> tick ,tick ~+> tick ,K ~+> v__01 ,K ~+> 0.1 ,K ~+> tick ,v__0 ~*> v__01 ,v__01 ~*> v__01 ,K ~*> v__01] eval_wise_bb1_in> [v__0 ~+> 0.1 ,v__0 ~+> tick ,v__01 ~+> v__01 ,v__01 ~+> 0.1 ,v__01 ~+> tick ,tick ~+> tick ,K ~+> v__01 ,K ~+> 0.1 ,K ~+> tick ,v__0 ~*> v__01 ,v__01 ~*> v__01 ,K ~*> v__01] YES(?,POLY)