YES(?,PRIMREC) * Step 1: TrivialSCCs MAYBE + Considered Problem: Rules: 0. eval_speedNestedMultiple_start(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 1. eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 2. eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 3. eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 4. eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 5. eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 6. eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 7. eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_x,v_y,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 8. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,v__01,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_n >= v__0] (?,1) 9. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__0 >= v_n] (?,1) 10. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_m >= v__1] (?,1) 11. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__1 >= v_m] (?,1) 12. eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 13. eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_7(v__0,v__01,v__1,nondef_0,v_5,v_m,v_n,v_x,v_y) True (?,1) 14. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_2 >= 0] (?,1) 15. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [0 >= v_2] (?,1) 16. eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,1 + v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 17. eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,1 + v__0,v_m,v_n,v_x,v_y) True (?,1) 18. eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 19. eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_5,v__1,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 20. eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_stop(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) Signature: {(eval_speedNestedMultiple_0,9) ;(eval_speedNestedMultiple_1,9) ;(eval_speedNestedMultiple_11,9) ;(eval_speedNestedMultiple_12,9) ;(eval_speedNestedMultiple_2,9) ;(eval_speedNestedMultiple_3,9) ;(eval_speedNestedMultiple_4,9) ;(eval_speedNestedMultiple_5,9) ;(eval_speedNestedMultiple_6,9) ;(eval_speedNestedMultiple_7,9) ;(eval_speedNestedMultiple__critedge_in,9) ;(eval_speedNestedMultiple_bb0_in,9) ;(eval_speedNestedMultiple_bb1_in,9) ;(eval_speedNestedMultiple_bb2_in,9) ;(eval_speedNestedMultiple_bb3_in,9) ;(eval_speedNestedMultiple_bb4_in,9) ;(eval_speedNestedMultiple_bb5_in,9) ;(eval_speedNestedMultiple_start,9) ;(eval_speedNestedMultiple_stop,9)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8,9},8->{10,11},9->{20},10->{12},11->{17},12->{13} ,13->{14,15},14->{16},15->{17},16->{10,11},17->{18},18->{19},19->{8,9},20->{}] + Applied Processor: TrivialSCCs + Details: All trivial SCCs of the transition graph admit timebound 1. * Step 2: AddSinks MAYBE + Considered Problem: Rules: 0. eval_speedNestedMultiple_start(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 1. eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 2. eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 3. eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 4. eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 5. eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 6. eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 7. eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_x,v_y,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 8. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,v__01,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_n >= v__0] (?,1) 9. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__0 >= v_n] (1,1) 10. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_m >= v__1] (?,1) 11. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__1 >= v_m] (?,1) 12. eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 13. eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_7(v__0,v__01,v__1,nondef_0,v_5,v_m,v_n,v_x,v_y) True (?,1) 14. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_2 >= 0] (?,1) 15. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [0 >= v_2] (?,1) 16. eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,1 + v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 17. eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,1 + v__0,v_m,v_n,v_x,v_y) True (?,1) 18. eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 19. eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_5,v__1,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 20. eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_stop(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) Signature: {(eval_speedNestedMultiple_0,9) ;(eval_speedNestedMultiple_1,9) ;(eval_speedNestedMultiple_11,9) ;(eval_speedNestedMultiple_12,9) ;(eval_speedNestedMultiple_2,9) ;(eval_speedNestedMultiple_3,9) ;(eval_speedNestedMultiple_4,9) ;(eval_speedNestedMultiple_5,9) ;(eval_speedNestedMultiple_6,9) ;(eval_speedNestedMultiple_7,9) ;(eval_speedNestedMultiple__critedge_in,9) ;(eval_speedNestedMultiple_bb0_in,9) ;(eval_speedNestedMultiple_bb1_in,9) ;(eval_speedNestedMultiple_bb2_in,9) ;(eval_speedNestedMultiple_bb3_in,9) ;(eval_speedNestedMultiple_bb4_in,9) ;(eval_speedNestedMultiple_bb5_in,9) ;(eval_speedNestedMultiple_start,9) ;(eval_speedNestedMultiple_stop,9)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8,9},8->{10,11},9->{20},10->{12},11->{17},12->{13} ,13->{14,15},14->{16},15->{17},16->{10,11},17->{18},18->{19},19->{8,9},20->{}] + Applied Processor: AddSinks + Details: () * Step 3: LooptreeTransformer MAYBE + Considered Problem: Rules: 0. eval_speedNestedMultiple_start(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 1. eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 2. eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 3. eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 4. eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 5. eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 6. eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 7. eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_x,v_y,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 8. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,v__01,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_n >= v__0] (?,1) 9. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__0 >= v_n] (?,1) 10. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_m >= v__1] (?,1) 11. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__1 >= v_m] (?,1) 12. eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 13. eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_7(v__0,v__01,v__1,nondef_0,v_5,v_m,v_n,v_x,v_y) True (?,1) 14. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_2 >= 0] (?,1) 15. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [0 >= v_2] (?,1) 16. eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,1 + v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 17. eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,1 + v__0,v_m,v_n,v_x,v_y) True (?,1) 18. eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 19. eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_5,v__1,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 20. eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_stop(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 21. eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> exitus616(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) Signature: {(eval_speedNestedMultiple_0,9) ;(eval_speedNestedMultiple_1,9) ;(eval_speedNestedMultiple_11,9) ;(eval_speedNestedMultiple_12,9) ;(eval_speedNestedMultiple_2,9) ;(eval_speedNestedMultiple_3,9) ;(eval_speedNestedMultiple_4,9) ;(eval_speedNestedMultiple_5,9) ;(eval_speedNestedMultiple_6,9) ;(eval_speedNestedMultiple_7,9) ;(eval_speedNestedMultiple__critedge_in,9) ;(eval_speedNestedMultiple_bb0_in,9) ;(eval_speedNestedMultiple_bb1_in,9) ;(eval_speedNestedMultiple_bb2_in,9) ;(eval_speedNestedMultiple_bb3_in,9) ;(eval_speedNestedMultiple_bb4_in,9) ;(eval_speedNestedMultiple_bb5_in,9) ;(eval_speedNestedMultiple_start,9) ;(eval_speedNestedMultiple_stop,9) ;(exitus616,9)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8,9},8->{10,11},9->{20,21},10->{12},11->{17} ,12->{13},13->{14,15},14->{16},15->{17},16->{10,11},17->{18},18->{19},19->{8,9},20->{},21->{}] + Applied Processor: LooptreeTransformer + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21] | `- p:[8,19,18,17,11,16,14,13,12,10,15] c: [8] | `- p:[10,16,14,13,12] c: [10] * Step 4: SizeAbstraction MAYBE + Considered Problem: (Rules: 0. eval_speedNestedMultiple_start(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (1,1) 1. eval_speedNestedMultiple_bb0_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 2. eval_speedNestedMultiple_0(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 3. eval_speedNestedMultiple_1(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 4. eval_speedNestedMultiple_2(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 5. eval_speedNestedMultiple_3(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 6. eval_speedNestedMultiple_4(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 7. eval_speedNestedMultiple_5(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_x,v_y,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 8. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,v__01,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_n >= v__0] (?,1) 9. eval_speedNestedMultiple_bb1_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__0 >= v_n] (?,1) 10. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_m >= v__1] (?,1) 11. eval_speedNestedMultiple_bb2_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [v__1 >= v_m] (?,1) 12. eval_speedNestedMultiple_bb3_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 13. eval_speedNestedMultiple_6(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_7(v__0,v__01,v__1,nondef_0,v_5,v_m,v_n,v_x,v_y) True (?,1) 14. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [-1 + v_2 >= 0] (?,1) 15. eval_speedNestedMultiple_7(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) [0 >= v_2] (?,1) 16. eval_speedNestedMultiple_bb4_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb2_in(v__0,v__01,1 + v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 17. eval_speedNestedMultiple__critedge_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,1 + v__0,v_m,v_n,v_x,v_y) True (?,1) 18. eval_speedNestedMultiple_11(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 19. eval_speedNestedMultiple_12(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_bb1_in(v_5,v__1,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 20. eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> eval_speedNestedMultiple_stop(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) 21. eval_speedNestedMultiple_bb5_in(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) -> exitus616(v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y) True (?,1) Signature: {(eval_speedNestedMultiple_0,9) ;(eval_speedNestedMultiple_1,9) ;(eval_speedNestedMultiple_11,9) ;(eval_speedNestedMultiple_12,9) ;(eval_speedNestedMultiple_2,9) ;(eval_speedNestedMultiple_3,9) ;(eval_speedNestedMultiple_4,9) ;(eval_speedNestedMultiple_5,9) ;(eval_speedNestedMultiple_6,9) ;(eval_speedNestedMultiple_7,9) ;(eval_speedNestedMultiple__critedge_in,9) ;(eval_speedNestedMultiple_bb0_in,9) ;(eval_speedNestedMultiple_bb1_in,9) ;(eval_speedNestedMultiple_bb2_in,9) ;(eval_speedNestedMultiple_bb3_in,9) ;(eval_speedNestedMultiple_bb4_in,9) ;(eval_speedNestedMultiple_bb5_in,9) ;(eval_speedNestedMultiple_start,9) ;(eval_speedNestedMultiple_stop,9) ;(exitus616,9)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8,9},8->{10,11},9->{20,21},10->{12},11->{17} ,12->{13},13->{14,15},14->{16},15->{17},16->{10,11},17->{18},18->{19},19->{8,9},20->{},21->{}] ,We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21] | `- p:[8,19,18,17,11,16,14,13,12,10,15] c: [8] | `- p:[10,16,14,13,12] c: [10]) + Applied Processor: SizeAbstraction UseCFG Minimize + Details: () * Step 5: FlowAbstraction MAYBE + Considered Problem: Program: Domain: [v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y,0.0,0.0.0] eval_speedNestedMultiple_start ~> eval_speedNestedMultiple_bb0_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb0_in ~> eval_speedNestedMultiple_0 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_0 ~> eval_speedNestedMultiple_1 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_1 ~> eval_speedNestedMultiple_2 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_2 ~> eval_speedNestedMultiple_3 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_3 ~> eval_speedNestedMultiple_4 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_4 ~> eval_speedNestedMultiple_5 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_5 ~> eval_speedNestedMultiple_bb1_in [v__0 <= v_x, v__01 <= v_y, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb1_in ~> eval_speedNestedMultiple_bb2_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__01, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb1_in ~> eval_speedNestedMultiple_bb5_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple_bb3_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple__critedge_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb3_in ~> eval_speedNestedMultiple_6 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_6 ~> eval_speedNestedMultiple_7 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= unknown, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple_bb4_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple__critedge_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb4_in ~> eval_speedNestedMultiple_bb2_in [v__0 <= v__0, v__01 <= v__01, v__1 <= K + v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple__critedge_in ~> eval_speedNestedMultiple_11 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= K + v__0, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_11 ~> eval_speedNestedMultiple_12 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_12 ~> eval_speedNestedMultiple_bb1_in [v__0 <= v_5, v__01 <= v__1, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb5_in ~> eval_speedNestedMultiple_stop [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb5_in ~> exitus616 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] + Loop: [0.0 <= K + v_5 + v__0 + v_n] eval_speedNestedMultiple_bb1_in ~> eval_speedNestedMultiple_bb2_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__01, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_12 ~> eval_speedNestedMultiple_bb1_in [v__0 <= v_5, v__01 <= v__1, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_11 ~> eval_speedNestedMultiple_12 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple__critedge_in ~> eval_speedNestedMultiple_11 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= K + v__0, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple__critedge_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb4_in ~> eval_speedNestedMultiple_bb2_in [v__0 <= v__0, v__01 <= v__01, v__1 <= K + v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple_bb4_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_6 ~> eval_speedNestedMultiple_7 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= unknown, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb3_in ~> eval_speedNestedMultiple_6 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple_bb3_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple__critedge_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] + Loop: [0.0.0 <= 2*K + v__1 + v_m] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple_bb3_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb4_in ~> eval_speedNestedMultiple_bb2_in [v__0 <= v__0, v__01 <= v__01, v__1 <= K + v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple_bb4_in [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_6 ~> eval_speedNestedMultiple_7 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= unknown, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] eval_speedNestedMultiple_bb3_in ~> eval_speedNestedMultiple_6 [v__0 <= v__0, v__01 <= v__01, v__1 <= v__1, v_2 <= v_2, v_5 <= v_5, v_m <= v_m, v_n <= v_n, v_x <= v_x, v_y <= v_y] + Applied Processor: FlowAbstraction + Details: () * Step 6: LareProcessor MAYBE + Considered Problem: Program: Domain: [tick,huge,K,v__0,v__01,v__1,v_2,v_5,v_m,v_n,v_x,v_y,0.0,0.0.0] eval_speedNestedMultiple_start ~> eval_speedNestedMultiple_bb0_in [] eval_speedNestedMultiple_bb0_in ~> eval_speedNestedMultiple_0 [] eval_speedNestedMultiple_0 ~> eval_speedNestedMultiple_1 [] eval_speedNestedMultiple_1 ~> eval_speedNestedMultiple_2 [] eval_speedNestedMultiple_2 ~> eval_speedNestedMultiple_3 [] eval_speedNestedMultiple_3 ~> eval_speedNestedMultiple_4 [] eval_speedNestedMultiple_4 ~> eval_speedNestedMultiple_5 [] eval_speedNestedMultiple_5 ~> eval_speedNestedMultiple_bb1_in [v_x ~=> v__0 ,v_y ~=> v__01] eval_speedNestedMultiple_bb1_in ~> eval_speedNestedMultiple_bb2_in [v__01 ~=> v__1] eval_speedNestedMultiple_bb1_in ~> eval_speedNestedMultiple_bb5_in [] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple_bb3_in [] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple__critedge_in [] eval_speedNestedMultiple_bb3_in ~> eval_speedNestedMultiple_6 [] eval_speedNestedMultiple_6 ~> eval_speedNestedMultiple_7 [huge ~=> v_2] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple_bb4_in [] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple__critedge_in [] eval_speedNestedMultiple_bb4_in ~> eval_speedNestedMultiple_bb2_in [v__1 ~+> v__1 ,K ~+> v__1] eval_speedNestedMultiple__critedge_in ~> eval_speedNestedMultiple_11 [v__0 ~+> v_5,K ~+> v_5] eval_speedNestedMultiple_11 ~> eval_speedNestedMultiple_12 [] eval_speedNestedMultiple_12 ~> eval_speedNestedMultiple_bb1_in [v_5 ~=> v__0 ,v__1 ~=> v__01] eval_speedNestedMultiple_bb5_in ~> eval_speedNestedMultiple_stop [] eval_speedNestedMultiple_bb5_in ~> exitus616 [] + Loop: [v_5 ~+> 0.0,v__0 ~+> 0.0,v_n ~+> 0.0,K ~+> 0.0] eval_speedNestedMultiple_bb1_in ~> eval_speedNestedMultiple_bb2_in [v__01 ~=> v__1] eval_speedNestedMultiple_12 ~> eval_speedNestedMultiple_bb1_in [v_5 ~=> v__0 ,v__1 ~=> v__01] eval_speedNestedMultiple_11 ~> eval_speedNestedMultiple_12 [] eval_speedNestedMultiple__critedge_in ~> eval_speedNestedMultiple_11 [v__0 ~+> v_5 ,K ~+> v_5] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple__critedge_in [] eval_speedNestedMultiple_bb4_in ~> eval_speedNestedMultiple_bb2_in [v__1 ~+> v__1 ,K ~+> v__1] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple_bb4_in [] eval_speedNestedMultiple_6 ~> eval_speedNestedMultiple_7 [huge ~=> v_2] eval_speedNestedMultiple_bb3_in ~> eval_speedNestedMultiple_6 [] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple_bb3_in [] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple__critedge_in [] + Loop: [v__1 ~+> 0.0.0,v_m ~+> 0.0.0,K ~*> 0.0.0] eval_speedNestedMultiple_bb2_in ~> eval_speedNestedMultiple_bb3_in [] eval_speedNestedMultiple_bb4_in ~> eval_speedNestedMultiple_bb2_in [v__1 ~+> v__1,K ~+> v__1] eval_speedNestedMultiple_7 ~> eval_speedNestedMultiple_bb4_in [] eval_speedNestedMultiple_6 ~> eval_speedNestedMultiple_7 [huge ~=> v_2] eval_speedNestedMultiple_bb3_in ~> eval_speedNestedMultiple_6 [] + Applied Processor: LareProcessor + Details: eval_speedNestedMultiple_start ~> exitus616 [v_x ~=> v__0 ,v_y ~=> v__01 ,v_y ~=> v__1 ,huge ~=> v_2 ,v_5 ~+> 0.0 ,v_5 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,v_x ~+> v_5 ,v_x ~+> v__0 ,v_x ~+> 0.0 ,v_x ~+> tick ,v_y ~+> v__01 ,v_y ~+> v__1 ,v_y ~+> 0.0.0 ,v_y ~+> tick ,tick ~+> tick ,K ~+> v_5 ,K ~+> v__0 ,K ~+> v__01 ,K ~+> v__1 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_5 ~*> v__0 ,v_5 ~*> v__01 ,v_5 ~*> v__1 ,v_5 ~*> 0.0.0 ,v_5 ~*> tick ,v_m ~*> v__01 ,v_m ~*> v__1 ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> v__0 ,v_n ~*> v__01 ,v_n ~*> v__1 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,v_x ~*> v__0 ,v_x ~*> v__01 ,v_x ~*> v__1 ,v_x ~*> 0.0.0 ,v_x ~*> tick ,v_y ~*> v__01 ,v_y ~*> v__1 ,v_y ~*> 0.0.0 ,v_y ~*> tick ,K ~*> v_5 ,K ~*> v__0 ,K ~*> v__01 ,K ~*> v__1 ,K ~*> 0.0.0 ,K ~*> tick ,v_5 ~^> v__01 ,v_5 ~^> v__1 ,v_5 ~^> 0.0.0 ,v_5 ~^> tick ,v_n ~^> v__01 ,v_n ~^> v__1 ,v_n ~^> 0.0.0 ,v_n ~^> tick ,v_x ~^> v__01 ,v_x ~^> v__1 ,v_x ~^> 0.0.0 ,v_x ~^> tick ,K ~^> v__01 ,K ~^> v__1 ,K ~^> 0.0.0 ,K ~^> tick] eval_speedNestedMultiple_start ~> eval_speedNestedMultiple_stop [v_x ~=> v__0 ,v_y ~=> v__01 ,v_y ~=> v__1 ,huge ~=> v_2 ,v_5 ~+> 0.0 ,v_5 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,v_x ~+> v_5 ,v_x ~+> v__0 ,v_x ~+> 0.0 ,v_x ~+> tick ,v_y ~+> v__01 ,v_y ~+> v__1 ,v_y ~+> 0.0.0 ,v_y ~+> tick ,tick ~+> tick ,K ~+> v_5 ,K ~+> v__0 ,K ~+> v__01 ,K ~+> v__1 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_5 ~*> v__0 ,v_5 ~*> v__01 ,v_5 ~*> v__1 ,v_5 ~*> 0.0.0 ,v_5 ~*> tick ,v_m ~*> v__01 ,v_m ~*> v__1 ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> v__0 ,v_n ~*> v__01 ,v_n ~*> v__1 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,v_x ~*> v__0 ,v_x ~*> v__01 ,v_x ~*> v__1 ,v_x ~*> 0.0.0 ,v_x ~*> tick ,v_y ~*> v__01 ,v_y ~*> v__1 ,v_y ~*> 0.0.0 ,v_y ~*> tick ,K ~*> v_5 ,K ~*> v__0 ,K ~*> v__01 ,K ~*> v__1 ,K ~*> 0.0.0 ,K ~*> tick ,v_5 ~^> v__01 ,v_5 ~^> v__1 ,v_5 ~^> 0.0.0 ,v_5 ~^> tick ,v_n ~^> v__01 ,v_n ~^> v__1 ,v_n ~^> 0.0.0 ,v_n ~^> tick ,v_x ~^> v__01 ,v_x ~^> v__1 ,v_x ~^> 0.0.0 ,v_x ~^> tick ,K ~^> v__01 ,K ~^> v__1 ,K ~^> 0.0.0 ,K ~^> tick] + eval_speedNestedMultiple_bb1_in> [v__01 ~=> v__1 ,huge ~=> v_2 ,v_5 ~+> 0.0 ,v_5 ~+> tick ,v__0 ~+> v_5 ,v__0 ~+> v__0 ,v__0 ~+> 0.0 ,v__0 ~+> tick ,v__01 ~+> v__01 ,v__01 ~+> v__1 ,v__01 ~+> 0.0.0 ,v__01 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> v_5 ,K ~+> v__0 ,K ~+> v__01 ,K ~+> v__1 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_5 ~*> v__0 ,v_5 ~*> v__01 ,v_5 ~*> v__1 ,v_5 ~*> 0.0.0 ,v_5 ~*> tick ,v__0 ~*> v__0 ,v__0 ~*> v__01 ,v__0 ~*> v__1 ,v__0 ~*> 0.0.0 ,v__0 ~*> tick ,v__01 ~*> v__01 ,v__01 ~*> v__1 ,v__01 ~*> 0.0.0 ,v__01 ~*> tick ,v_m ~*> v__01 ,v_m ~*> v__1 ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> v__0 ,v_n ~*> v__01 ,v_n ~*> v__1 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,K ~*> v_5 ,K ~*> v__0 ,K ~*> v__01 ,K ~*> v__1 ,K ~*> 0.0.0 ,K ~*> tick ,v_5 ~^> v__01 ,v_5 ~^> v__1 ,v_5 ~^> 0.0.0 ,v_5 ~^> tick ,v__0 ~^> v__01 ,v__0 ~^> v__1 ,v__0 ~^> 0.0.0 ,v__0 ~^> tick ,v_n ~^> v__01 ,v_n ~^> v__1 ,v_n ~^> 0.0.0 ,v_n ~^> tick ,K ~^> v__01 ,K ~^> v__1 ,K ~^> 0.0.0 ,K ~^> tick] + eval_speedNestedMultiple_bb2_in> [huge ~=> v_2 ,v__1 ~+> v__1 ,v__1 ~+> 0.0.0 ,v__1 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,tick ~+> tick ,K ~+> v__1 ,v__1 ~*> v__1 ,v_m ~*> v__1 ,K ~*> v__1 ,K ~*> 0.0.0 ,K ~*> tick] eval_speedNestedMultiple_7> [huge ~=> v_2 ,v__1 ~+> v__1 ,v__1 ~+> 0.0.0 ,v__1 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,tick ~+> tick ,K ~+> v__1 ,v__1 ~*> v__1 ,v_m ~*> v__1 ,K ~*> v__1 ,K ~*> 0.0.0 ,K ~*> tick] YES(?,PRIMREC)