YES(?,POLY) * Step 1: TrivialSCCs WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_speedNestedMultipleDep_start(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 1. eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 2. eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 3. eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 4. eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 5. eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 6. eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 7. eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 8. eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,0,v_y_0) True (?,1) 9. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1 + v_n >= v_x_0] (?,1) 10. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && v_x_0 >= v_n] (?,1) 11. eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(1 + v_x_0,v_m,v_n,v_x_0,0) [-1 + v_n + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_n >= 0] (?,1) 12. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && -1 + v_m >= v_y_0] 13. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_1,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && v_y_0 >= v_m] 14. eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,1 + v_y_0) [-1 + v_m + -1*v_y_0 >= 0 (?,1) && v_y_0 >= 0 && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_m + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_m + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_m >= 0 && -2 + v_1 + v_m >= 0 && -1 + v_1 >= 0] 15. eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_stop(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1*v_n + v_x_0 >= 0] (?,1) Signature: {(eval_speedNestedMultipleDep_0,5) ;(eval_speedNestedMultipleDep_1,5) ;(eval_speedNestedMultipleDep_2,5) ;(eval_speedNestedMultipleDep_3,5) ;(eval_speedNestedMultipleDep_4,5) ;(eval_speedNestedMultipleDep_5,5) ;(eval_speedNestedMultipleDep_6,5) ;(eval_speedNestedMultipleDep_bb0_in,5) ;(eval_speedNestedMultipleDep_bb1_in,5) ;(eval_speedNestedMultipleDep_bb2_in,5) ;(eval_speedNestedMultipleDep_bb3_in,5) ;(eval_speedNestedMultipleDep_bb4_in,5) ;(eval_speedNestedMultipleDep_bb5_in,5) ;(eval_speedNestedMultipleDep_start,5) ;(eval_speedNestedMultipleDep_stop,5)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9,10},9->{11},10->{15},11->{12,13},12->{14} ,13->{9,10},14->{12,13},15->{}] + Applied Processor: TrivialSCCs + Details: All trivial SCCs of the transition graph admit timebound 1. * Step 2: AddSinks WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_speedNestedMultipleDep_start(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 1. eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 2. eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 3. eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 4. eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 5. eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 6. eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 7. eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 8. eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,0,v_y_0) True (1,1) 9. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1 + v_n >= v_x_0] (?,1) 10. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && v_x_0 >= v_n] (1,1) 11. eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(1 + v_x_0,v_m,v_n,v_x_0,0) [-1 + v_n + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_n >= 0] (?,1) 12. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && -1 + v_m >= v_y_0] 13. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_1,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && v_y_0 >= v_m] 14. eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,1 + v_y_0) [-1 + v_m + -1*v_y_0 >= 0 (?,1) && v_y_0 >= 0 && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_m + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_m + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_m >= 0 && -2 + v_1 + v_m >= 0 && -1 + v_1 >= 0] 15. eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_stop(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1*v_n + v_x_0 >= 0] (1,1) Signature: {(eval_speedNestedMultipleDep_0,5) ;(eval_speedNestedMultipleDep_1,5) ;(eval_speedNestedMultipleDep_2,5) ;(eval_speedNestedMultipleDep_3,5) ;(eval_speedNestedMultipleDep_4,5) ;(eval_speedNestedMultipleDep_5,5) ;(eval_speedNestedMultipleDep_6,5) ;(eval_speedNestedMultipleDep_bb0_in,5) ;(eval_speedNestedMultipleDep_bb1_in,5) ;(eval_speedNestedMultipleDep_bb2_in,5) ;(eval_speedNestedMultipleDep_bb3_in,5) ;(eval_speedNestedMultipleDep_bb4_in,5) ;(eval_speedNestedMultipleDep_bb5_in,5) ;(eval_speedNestedMultipleDep_start,5) ;(eval_speedNestedMultipleDep_stop,5)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9,10},9->{11},10->{15},11->{12,13},12->{14} ,13->{9,10},14->{12,13},15->{}] + Applied Processor: AddSinks + Details: () * Step 3: LooptreeTransformer WORST_CASE(?,POLY) + Considered Problem: Rules: 0. eval_speedNestedMultipleDep_start(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 1. eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 2. eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 3. eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 4. eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 5. eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 6. eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 7. eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 8. eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,0,v_y_0) True (?,1) 9. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1 + v_n >= v_x_0] (?,1) 10. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && v_x_0 >= v_n] (?,1) 11. eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(1 + v_x_0,v_m,v_n,v_x_0,0) [-1 + v_n + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_n >= 0] (?,1) 12. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && -1 + v_m >= v_y_0] 13. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_1,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && v_y_0 >= v_m] 14. eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,1 + v_y_0) [-1 + v_m + -1*v_y_0 >= 0 (?,1) && v_y_0 >= 0 && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_m + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_m + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_m >= 0 && -2 + v_1 + v_m >= 0 && -1 + v_1 >= 0] 15. eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_stop(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1*v_n + v_x_0 >= 0] (?,1) 16. eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) -> exitus616(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) Signature: {(eval_speedNestedMultipleDep_0,5) ;(eval_speedNestedMultipleDep_1,5) ;(eval_speedNestedMultipleDep_2,5) ;(eval_speedNestedMultipleDep_3,5) ;(eval_speedNestedMultipleDep_4,5) ;(eval_speedNestedMultipleDep_5,5) ;(eval_speedNestedMultipleDep_6,5) ;(eval_speedNestedMultipleDep_bb0_in,5) ;(eval_speedNestedMultipleDep_bb1_in,5) ;(eval_speedNestedMultipleDep_bb2_in,5) ;(eval_speedNestedMultipleDep_bb3_in,5) ;(eval_speedNestedMultipleDep_bb4_in,5) ;(eval_speedNestedMultipleDep_bb5_in,5) ;(eval_speedNestedMultipleDep_start,5) ;(eval_speedNestedMultipleDep_stop,5) ;(exitus616,5)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9,10},9->{11},10->{15,16},11->{12,13} ,12->{14},13->{9,10},14->{12,13},15->{},16->{}] + Applied Processor: LooptreeTransformer + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16] | `- p:[9,13,11,14,12] c: [13] | `- p:[12,14] c: [14] * Step 4: SizeAbstraction WORST_CASE(?,POLY) + Considered Problem: (Rules: 0. eval_speedNestedMultipleDep_start(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) True (1,1) 1. eval_speedNestedMultipleDep_bb0_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 2. eval_speedNestedMultipleDep_0(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 3. eval_speedNestedMultipleDep_1(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 4. eval_speedNestedMultipleDep_2(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 5. eval_speedNestedMultipleDep_3(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 6. eval_speedNestedMultipleDep_4(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 7. eval_speedNestedMultipleDep_5(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) 8. eval_speedNestedMultipleDep_6(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,0,v_y_0) True (?,1) 9. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1 + v_n >= v_x_0] (?,1) 10. eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && v_x_0 >= v_n] (?,1) 11. eval_speedNestedMultipleDep_bb2_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(1 + v_x_0,v_m,v_n,v_x_0,0) [-1 + v_n + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_n >= 0] (?,1) 12. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && -1 + v_m >= v_y_0] 13. eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb1_in(v_1,v_m,v_n,v_1,v_y_0) [v_y_0 >= 0 (?,1) && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_1 >= 0 && v_y_0 >= v_m] 14. eval_speedNestedMultipleDep_bb4_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_bb3_in(v_1,v_m,v_n,v_x_0,1 + v_y_0) [-1 + v_m + -1*v_y_0 >= 0 (?,1) && v_y_0 >= 0 && v_x_0 + v_y_0 >= 0 && -1 + v_n + v_y_0 >= 0 && -1 + v_m + v_y_0 >= 0 && -1 + v_1 + v_y_0 >= 0 && -1 + v_n + -1*v_x_0 >= 0 && -1 + v_1 + -1*v_x_0 >= 0 && v_x_0 >= 0 && -1 + v_n + v_x_0 >= 0 && -1 + v_m + v_x_0 >= 0 && -1 + v_1 + v_x_0 >= 0 && 1 + -1*v_1 + v_x_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -2 + v_1 + v_n >= 0 && -1*v_1 + v_n >= 0 && -1 + v_m >= 0 && -2 + v_1 + v_m >= 0 && -1 + v_1 >= 0] 15. eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) -> eval_speedNestedMultipleDep_stop(v_1,v_m,v_n,v_x_0,v_y_0) [v_x_0 >= 0 && -1*v_n + v_x_0 >= 0] (?,1) 16. eval_speedNestedMultipleDep_bb5_in(v_1,v_m,v_n,v_x_0,v_y_0) -> exitus616(v_1,v_m,v_n,v_x_0,v_y_0) True (?,1) Signature: {(eval_speedNestedMultipleDep_0,5) ;(eval_speedNestedMultipleDep_1,5) ;(eval_speedNestedMultipleDep_2,5) ;(eval_speedNestedMultipleDep_3,5) ;(eval_speedNestedMultipleDep_4,5) ;(eval_speedNestedMultipleDep_5,5) ;(eval_speedNestedMultipleDep_6,5) ;(eval_speedNestedMultipleDep_bb0_in,5) ;(eval_speedNestedMultipleDep_bb1_in,5) ;(eval_speedNestedMultipleDep_bb2_in,5) ;(eval_speedNestedMultipleDep_bb3_in,5) ;(eval_speedNestedMultipleDep_bb4_in,5) ;(eval_speedNestedMultipleDep_bb5_in,5) ;(eval_speedNestedMultipleDep_start,5) ;(eval_speedNestedMultipleDep_stop,5) ;(exitus616,5)} Flow Graph: [0->{1},1->{2},2->{3},3->{4},4->{5},5->{6},6->{7},7->{8},8->{9,10},9->{11},10->{15,16},11->{12,13} ,12->{14},13->{9,10},14->{12,13},15->{},16->{}] ,We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16] | `- p:[9,13,11,14,12] c: [13] | `- p:[12,14] c: [14]) + Applied Processor: SizeAbstraction UseCFG Minimize + Details: () * Step 5: FlowAbstraction WORST_CASE(?,POLY) + Considered Problem: Program: Domain: [v_1,v_m,v_n,v_x_0,v_y_0,0.0,0.0.0] eval_speedNestedMultipleDep_start ~> eval_speedNestedMultipleDep_bb0_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb0_in ~> eval_speedNestedMultipleDep_0 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_0 ~> eval_speedNestedMultipleDep_1 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_1 ~> eval_speedNestedMultipleDep_2 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_2 ~> eval_speedNestedMultipleDep_3 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_3 ~> eval_speedNestedMultipleDep_4 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_4 ~> eval_speedNestedMultipleDep_5 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_5 ~> eval_speedNestedMultipleDep_6 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_6 ~> eval_speedNestedMultipleDep_bb1_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= 0*K, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb1_in ~> eval_speedNestedMultipleDep_bb2_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb1_in ~> eval_speedNestedMultipleDep_bb5_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb2_in ~> eval_speedNestedMultipleDep_bb3_in [v_1 <= v_n, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= 0*K] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb4_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb1_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_1, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb4_in ~> eval_speedNestedMultipleDep_bb3_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_m] eval_speedNestedMultipleDep_bb5_in ~> eval_speedNestedMultipleDep_stop [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb5_in ~> exitus616 [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] + Loop: [0.0 <= K + v_1 + v_n + v_x_0] eval_speedNestedMultipleDep_bb1_in ~> eval_speedNestedMultipleDep_bb2_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb1_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_1, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb2_in ~> eval_speedNestedMultipleDep_bb3_in [v_1 <= v_n, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= 0*K] eval_speedNestedMultipleDep_bb4_in ~> eval_speedNestedMultipleDep_bb3_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_m] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb4_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] + Loop: [0.0.0 <= v_m + v_y_0] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb4_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_y_0] eval_speedNestedMultipleDep_bb4_in ~> eval_speedNestedMultipleDep_bb3_in [v_1 <= v_1, v_m <= v_m, v_n <= v_n, v_x_0 <= v_x_0, v_y_0 <= v_m] + Applied Processor: FlowAbstraction + Details: () * Step 6: LareProcessor WORST_CASE(?,POLY) + Considered Problem: Program: Domain: [tick,huge,K,v_1,v_m,v_n,v_x_0,v_y_0,0.0,0.0.0] eval_speedNestedMultipleDep_start ~> eval_speedNestedMultipleDep_bb0_in [] eval_speedNestedMultipleDep_bb0_in ~> eval_speedNestedMultipleDep_0 [] eval_speedNestedMultipleDep_0 ~> eval_speedNestedMultipleDep_1 [] eval_speedNestedMultipleDep_1 ~> eval_speedNestedMultipleDep_2 [] eval_speedNestedMultipleDep_2 ~> eval_speedNestedMultipleDep_3 [] eval_speedNestedMultipleDep_3 ~> eval_speedNestedMultipleDep_4 [] eval_speedNestedMultipleDep_4 ~> eval_speedNestedMultipleDep_5 [] eval_speedNestedMultipleDep_5 ~> eval_speedNestedMultipleDep_6 [] eval_speedNestedMultipleDep_6 ~> eval_speedNestedMultipleDep_bb1_in [K ~=> v_x_0] eval_speedNestedMultipleDep_bb1_in ~> eval_speedNestedMultipleDep_bb2_in [] eval_speedNestedMultipleDep_bb1_in ~> eval_speedNestedMultipleDep_bb5_in [] eval_speedNestedMultipleDep_bb2_in ~> eval_speedNestedMultipleDep_bb3_in [v_n ~=> v_1,K ~=> v_y_0] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb4_in [] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb1_in [v_1 ~=> v_x_0] eval_speedNestedMultipleDep_bb4_in ~> eval_speedNestedMultipleDep_bb3_in [v_m ~=> v_y_0] eval_speedNestedMultipleDep_bb5_in ~> eval_speedNestedMultipleDep_stop [] eval_speedNestedMultipleDep_bb5_in ~> exitus616 [] + Loop: [v_1 ~+> 0.0,v_n ~+> 0.0,v_x_0 ~+> 0.0,K ~+> 0.0] eval_speedNestedMultipleDep_bb1_in ~> eval_speedNestedMultipleDep_bb2_in [] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb1_in [v_1 ~=> v_x_0] eval_speedNestedMultipleDep_bb2_in ~> eval_speedNestedMultipleDep_bb3_in [v_n ~=> v_1,K ~=> v_y_0] eval_speedNestedMultipleDep_bb4_in ~> eval_speedNestedMultipleDep_bb3_in [v_m ~=> v_y_0] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb4_in [] + Loop: [v_m ~+> 0.0.0,v_y_0 ~+> 0.0.0] eval_speedNestedMultipleDep_bb3_in ~> eval_speedNestedMultipleDep_bb4_in [] eval_speedNestedMultipleDep_bb4_in ~> eval_speedNestedMultipleDep_bb3_in [v_m ~=> v_y_0] + Applied Processor: LareProcessor + Details: eval_speedNestedMultipleDep_start ~> eval_speedNestedMultipleDep_stop [v_m ~=> v_y_0 ,v_n ~=> v_1 ,v_n ~=> v_x_0 ,K ~=> v_x_0 ,K ~=> v_y_0 ,v_1 ~+> 0.0 ,v_1 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_1 ~*> tick ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> tick ,K ~*> 0.0 ,K ~*> tick] eval_speedNestedMultipleDep_start ~> exitus616 [v_m ~=> v_y_0 ,v_n ~=> v_1 ,v_n ~=> v_x_0 ,K ~=> v_x_0 ,K ~=> v_y_0 ,v_1 ~+> 0.0 ,v_1 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_1 ~*> tick ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> tick ,K ~*> 0.0 ,K ~*> tick] + eval_speedNestedMultipleDep_bb1_in> [v_m ~=> v_y_0 ,v_n ~=> v_1 ,v_n ~=> v_x_0 ,K ~=> v_y_0 ,v_1 ~+> 0.0 ,v_1 ~+> tick ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,v_x_0 ~+> 0.0 ,v_x_0 ~+> tick ,tick ~+> tick ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_1 ~*> tick ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> tick ,v_x_0 ~*> tick ,K ~*> tick] + eval_speedNestedMultipleDep_bb3_in> [v_m ~=> v_y_0 ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_y_0 ~+> 0.0.0 ,v_y_0 ~+> tick ,tick ~+> tick] YES(?,POLY)