YES(?,PRIMREC) * Step 1: UnsatRules MAYBE + Considered Problem: Rules: 0. eval_speedpldi3_start(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) True (1,1) 1. eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) True (?,1) 2. eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) True (?,1) 3. eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) True (?,1) 4. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [0 >= v_m] (?,1) 5. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_m >= v_n] (?,1) 6. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(0,0,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] (?,1) 7. eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] (?,1) 8. eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_i_0 >= v_n] (?,1) 9. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] (?,1) 10. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(1 + v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && v_j_0 >= v_m] (?,1) 11. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(v_i_0,0,v_m,v_n) [v_j_0 >= v_m && -1 + v_m >= v_j_0] (?,1) 12. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] (?,1) 13. eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_stop(v_i_0,v_j_0,v_m,v_n) True (?,1) Signature: {(eval_speedpldi3_0,4) ;(eval_speedpldi3_1,4) ;(eval_speedpldi3_2,4) ;(eval_speedpldi3_bb0_in,4) ;(eval_speedpldi3_bb1_in,4) ;(eval_speedpldi3_bb2_in,4) ;(eval_speedpldi3_bb3_in,4) ;(eval_speedpldi3_start,4) ;(eval_speedpldi3_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{13},5->{13},6->{7,8},7->{9,10,11,12},8->{13},9->{7,8},10->{7,8} ,11->{7,8},12->{7,8},13->{}] + Applied Processor: UnsatRules + Details: Following transitions have unsatisfiable constraints and are removed: [10,11] * Step 2: UnsatPaths MAYBE + Considered Problem: Rules: 0. eval_speedpldi3_start(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) True (1,1) 1. eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) True (?,1) 2. eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) True (?,1) 3. eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) True (?,1) 4. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [0 >= v_m] (?,1) 5. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_m >= v_n] (?,1) 6. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(0,0,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] (?,1) 7. eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] (?,1) 8. eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_i_0 >= v_n] (?,1) 9. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] (?,1) 12. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] (?,1) 13. eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_stop(v_i_0,v_j_0,v_m,v_n) True (?,1) Signature: {(eval_speedpldi3_0,4) ;(eval_speedpldi3_1,4) ;(eval_speedpldi3_2,4) ;(eval_speedpldi3_bb0_in,4) ;(eval_speedpldi3_bb1_in,4) ;(eval_speedpldi3_bb2_in,4) ;(eval_speedpldi3_bb3_in,4) ;(eval_speedpldi3_start,4) ;(eval_speedpldi3_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{13},5->{13},6->{7,8},7->{9,12},8->{13},9->{7,8},12->{7,8},13->{}] + Applied Processor: UnsatPaths + Details: We remove following edges from the transition graph: [(6,8)] * Step 3: FromIts MAYBE + Considered Problem: Rules: 0. eval_speedpldi3_start(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) True (1,1) 1. eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) True (?,1) 2. eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) True (?,1) 3. eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) True (?,1) 4. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [0 >= v_m] (?,1) 5. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_m >= v_n] (?,1) 6. eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(0,0,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] (?,1) 7. eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] (?,1) 8. eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_i_0 >= v_n] (?,1) 9. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] (?,1) 12. eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] (?,1) 13. eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_stop(v_i_0,v_j_0,v_m,v_n) True (?,1) Signature: {(eval_speedpldi3_0,4) ;(eval_speedpldi3_1,4) ;(eval_speedpldi3_2,4) ;(eval_speedpldi3_bb0_in,4) ;(eval_speedpldi3_bb1_in,4) ;(eval_speedpldi3_bb2_in,4) ;(eval_speedpldi3_bb3_in,4) ;(eval_speedpldi3_start,4) ;(eval_speedpldi3_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{13},5->{13},6->{7},7->{9,12},8->{13},9->{7,8},12->{7,8},13->{}] + Applied Processor: FromIts + Details: () * Step 4: Unfold MAYBE + Considered Problem: Rules: eval_speedpldi3_start(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_bb0_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_0(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [0 >= v_m] eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_m >= v_n] eval_speedpldi3_2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(0,0,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] eval_speedpldi3_bb1_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) [v_i_0 >= v_n] eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] eval_speedpldi3_bb2_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] eval_speedpldi3_bb3_in(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_stop(v_i_0,v_j_0,v_m,v_n) True Signature: {(eval_speedpldi3_0,4) ;(eval_speedpldi3_1,4) ;(eval_speedpldi3_2,4) ;(eval_speedpldi3_bb0_in,4) ;(eval_speedpldi3_bb1_in,4) ;(eval_speedpldi3_bb2_in,4) ;(eval_speedpldi3_bb3_in,4) ;(eval_speedpldi3_start,4) ;(eval_speedpldi3_stop,4)} Rule Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{13},5->{13},6->{7},7->{9,12},8->{13},9->{7,8},12->{7,8},13->{}] + Applied Processor: Unfold + Details: () * Step 5: AddSinks MAYBE + Considered Problem: Rules: eval_speedpldi3_start.0(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb0_in.1(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_bb0_in.1(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_0.2(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_0.2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.4(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.5(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.6(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_2.4(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [0 >= v_m] eval_speedpldi3_2.5(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [v_m >= v_n] eval_speedpldi3_2.6(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(0,0,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] eval_speedpldi3_bb1_in.7(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] eval_speedpldi3_bb1_in.7(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] eval_speedpldi3_bb1_in.8(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [v_i_0 >= v_n] eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.8(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.8(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) True Signature: {(eval_speedpldi3_0.2,4) ;(eval_speedpldi3_1.3,4) ;(eval_speedpldi3_2.4,4) ;(eval_speedpldi3_2.5,4) ;(eval_speedpldi3_2.6,4) ;(eval_speedpldi3_bb0_in.1,4) ;(eval_speedpldi3_bb1_in.7,4) ;(eval_speedpldi3_bb1_in.8,4) ;(eval_speedpldi3_bb2_in.12,4) ;(eval_speedpldi3_bb2_in.9,4) ;(eval_speedpldi3_bb3_in.13,4) ;(eval_speedpldi3_start.0,4) ;(eval_speedpldi3_stop.14,4)} Rule Graph: [0->{1},1->{2},2->{3,4,5},3->{6},4->{7},5->{8},6->{16},7->{16},8->{9,10},9->{12,13},10->{14,15},11->{16} ,12->{9,10},13->{11},14->{9,10},15->{11},16->{}] + Applied Processor: AddSinks + Details: () * Step 6: Decompose MAYBE + Considered Problem: Rules: eval_speedpldi3_start.0(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb0_in.1(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_bb0_in.1(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_0.2(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_0.2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.4(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.5(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.6(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_2.4(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [0 >= v_m] eval_speedpldi3_2.5(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [v_m >= v_n] eval_speedpldi3_2.6(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(0,0,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] eval_speedpldi3_bb1_in.7(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] eval_speedpldi3_bb1_in.7(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] eval_speedpldi3_bb1_in.8(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [v_i_0 >= v_n] eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.8(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.8(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True Signature: {(eval_speedpldi3_0.2,4) ;(eval_speedpldi3_1.3,4) ;(eval_speedpldi3_2.4,4) ;(eval_speedpldi3_2.5,4) ;(eval_speedpldi3_2.6,4) ;(eval_speedpldi3_bb0_in.1,4) ;(eval_speedpldi3_bb1_in.7,4) ;(eval_speedpldi3_bb1_in.8,4) ;(eval_speedpldi3_bb2_in.12,4) ;(eval_speedpldi3_bb2_in.9,4) ;(eval_speedpldi3_bb3_in.13,4) ;(eval_speedpldi3_start.0,4) ;(eval_speedpldi3_stop.14,4) ;(exitus616,4)} Rule Graph: [0->{1},1->{2},2->{3,4,5},3->{6},4->{7},5->{8},6->{16},7->{16},8->{9,10},9->{12,13},10->{14,15},11->{16} ,12->{9,10},13->{11},14->{9,10},15->{11},16->{17,18,19,20}] + Applied Processor: Decompose Greedy + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20] | `- p:[9,12,14,10] c: [10,14] | `- p:[9,12] c: [9,12] * Step 7: AbstractSize MAYBE + Considered Problem: (Rules: eval_speedpldi3_start.0(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb0_in.1(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_bb0_in.1(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_0.2(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_0.2(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.4(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.5(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_1.3(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_2.6(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_2.4(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [0 >= v_m] eval_speedpldi3_2.5(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [v_m >= v_n] eval_speedpldi3_2.6(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(0,0,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] eval_speedpldi3_bb1_in.7(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] eval_speedpldi3_bb1_in.7(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) [-1 + v_n >= v_i_0] eval_speedpldi3_bb1_in.8(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) [v_i_0 >= v_n] eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] eval_speedpldi3_bb2_in.9(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.8(v_i_0,1 + v_j_0,v_m,v_n) [-1 + v_m >= v_j_0 && -1 + v_m >= v_j_0] eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.7(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] eval_speedpldi3_bb2_in.12(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_bb1_in.8(1 + v_i_0,0,v_m,v_n) [v_j_0 >= v_m && v_j_0 >= v_m] eval_speedpldi3_bb3_in.13(v_i_0,v_j_0,v_m,v_n) -> eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True eval_speedpldi3_stop.14(v_i_0,v_j_0,v_m,v_n) -> exitus616(v_i_0,v_j_0,v_m,v_n) True Signature: {(eval_speedpldi3_0.2,4) ;(eval_speedpldi3_1.3,4) ;(eval_speedpldi3_2.4,4) ;(eval_speedpldi3_2.5,4) ;(eval_speedpldi3_2.6,4) ;(eval_speedpldi3_bb0_in.1,4) ;(eval_speedpldi3_bb1_in.7,4) ;(eval_speedpldi3_bb1_in.8,4) ;(eval_speedpldi3_bb2_in.12,4) ;(eval_speedpldi3_bb2_in.9,4) ;(eval_speedpldi3_bb3_in.13,4) ;(eval_speedpldi3_start.0,4) ;(eval_speedpldi3_stop.14,4) ;(exitus616,4)} Rule Graph: [0->{1},1->{2},2->{3,4,5},3->{6},4->{7},5->{8},6->{16},7->{16},8->{9,10},9->{12,13},10->{14,15},11->{16} ,12->{9,10},13->{11},14->{9,10},15->{11},16->{17,18,19,20}] ,We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20] | `- p:[9,12,14,10] c: [10,14] | `- p:[9,12] c: [9,12]) + Applied Processor: AbstractSize Minimize + Details: () * Step 8: AbstractFlow MAYBE + Considered Problem: Program: Domain: [v_i_0,v_j_0,v_m,v_n,0.0,0.0.0] eval_speedpldi3_start.0 ~> eval_speedpldi3_bb0_in.1 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb0_in.1 ~> eval_speedpldi3_0.2 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_0.2 ~> eval_speedpldi3_1.3 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_1.3 ~> eval_speedpldi3_2.4 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_1.3 ~> eval_speedpldi3_2.5 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_1.3 ~> eval_speedpldi3_2.6 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_2.4 ~> eval_speedpldi3_bb3_in.13 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_2.5 ~> eval_speedpldi3_bb3_in.13 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_2.6 ~> eval_speedpldi3_bb1_in.7 [v_i_0 <= 0*K, v_j_0 <= 0*K, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.9 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.12 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb1_in.8 ~> eval_speedpldi3_bb3_in.13 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.7 [v_i_0 <= v_i_0, v_j_0 <= v_j_0 + v_m, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.8 [v_i_0 <= v_i_0, v_j_0 <= v_j_0 + v_m, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb2_in.12 ~> eval_speedpldi3_bb1_in.7 [v_i_0 <= K + v_i_0, v_j_0 <= 0*K, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb2_in.12 ~> eval_speedpldi3_bb1_in.8 [v_i_0 <= K + v_i_0, v_j_0 <= 0*K, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb3_in.13 ~> eval_speedpldi3_stop.14 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_stop.14 ~> exitus616 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_stop.14 ~> exitus616 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_stop.14 ~> exitus616 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_stop.14 ~> exitus616 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] + Loop: [0.0 <= K + v_i_0 + v_n] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.9 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.7 [v_i_0 <= v_i_0, v_j_0 <= v_j_0 + v_m, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb2_in.12 ~> eval_speedpldi3_bb1_in.7 [v_i_0 <= K + v_i_0, v_j_0 <= 0*K, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.12 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] + Loop: [0.0.0 <= K + v_j_0 + v_m] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.9 [v_i_0 <= v_i_0, v_j_0 <= v_j_0, v_m <= v_m, v_n <= v_n] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.7 [v_i_0 <= v_i_0, v_j_0 <= v_j_0 + v_m, v_m <= v_m, v_n <= v_n] + Applied Processor: AbstractFlow + Details: () * Step 9: Lare MAYBE + Considered Problem: Program: Domain: [tick,huge,K,v_i_0,v_j_0,v_m,v_n,0.0,0.0.0] eval_speedpldi3_start.0 ~> eval_speedpldi3_bb0_in.1 [] eval_speedpldi3_bb0_in.1 ~> eval_speedpldi3_0.2 [] eval_speedpldi3_0.2 ~> eval_speedpldi3_1.3 [] eval_speedpldi3_1.3 ~> eval_speedpldi3_2.4 [] eval_speedpldi3_1.3 ~> eval_speedpldi3_2.5 [] eval_speedpldi3_1.3 ~> eval_speedpldi3_2.6 [] eval_speedpldi3_2.4 ~> eval_speedpldi3_bb3_in.13 [] eval_speedpldi3_2.5 ~> eval_speedpldi3_bb3_in.13 [] eval_speedpldi3_2.6 ~> eval_speedpldi3_bb1_in.7 [K ~=> v_i_0,K ~=> v_j_0] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.9 [] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.12 [] eval_speedpldi3_bb1_in.8 ~> eval_speedpldi3_bb3_in.13 [] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.7 [v_j_0 ~+> v_j_0,v_m ~+> v_j_0] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.8 [v_j_0 ~+> v_j_0,v_m ~+> v_j_0] eval_speedpldi3_bb2_in.12 ~> eval_speedpldi3_bb1_in.7 [K ~=> v_j_0,v_i_0 ~+> v_i_0,K ~+> v_i_0] eval_speedpldi3_bb2_in.12 ~> eval_speedpldi3_bb1_in.8 [K ~=> v_j_0,v_i_0 ~+> v_i_0,K ~+> v_i_0] eval_speedpldi3_bb3_in.13 ~> eval_speedpldi3_stop.14 [] eval_speedpldi3_stop.14 ~> exitus616 [] eval_speedpldi3_stop.14 ~> exitus616 [] eval_speedpldi3_stop.14 ~> exitus616 [] eval_speedpldi3_stop.14 ~> exitus616 [] + Loop: [v_i_0 ~+> 0.0,v_n ~+> 0.0,K ~+> 0.0] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.9 [] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.7 [v_j_0 ~+> v_j_0,v_m ~+> v_j_0] eval_speedpldi3_bb2_in.12 ~> eval_speedpldi3_bb1_in.7 [K ~=> v_j_0,v_i_0 ~+> v_i_0,K ~+> v_i_0] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.12 [] + Loop: [v_j_0 ~+> 0.0.0,v_m ~+> 0.0.0,K ~+> 0.0.0] eval_speedpldi3_bb1_in.7 ~> eval_speedpldi3_bb2_in.9 [] eval_speedpldi3_bb2_in.9 ~> eval_speedpldi3_bb1_in.7 [v_j_0 ~+> v_j_0,v_m ~+> v_j_0] + Applied Processor: Lare + Details: eval_speedpldi3_start.0 ~> exitus616 [K ~=> v_i_0 ,K ~=> v_j_0 ,v_m ~+> v_j_0 ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> v_i_0 ,K ~+> v_j_0 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_m ~*> v_j_0 ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> v_i_0 ,v_n ~*> v_j_0 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,K ~*> v_i_0 ,K ~*> v_j_0 ,K ~*> 0.0 ,K ~*> 0.0.0 ,K ~*> tick ,v_n ~^> v_j_0 ,v_n ~^> 0.0.0 ,v_n ~^> tick ,K ~^> v_j_0 ,K ~^> 0.0.0 ,K ~^> tick] + eval_speedpldi3_bb2_in.9> [K ~=> v_j_0 ,v_i_0 ~+> v_i_0 ,v_i_0 ~+> 0.0 ,v_i_0 ~+> tick ,v_j_0 ~+> v_j_0 ,v_j_0 ~+> 0.0.0 ,v_j_0 ~+> tick ,v_m ~+> v_j_0 ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> v_i_0 ,K ~+> v_j_0 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_i_0 ~*> v_i_0 ,v_i_0 ~*> v_j_0 ,v_i_0 ~*> 0.0.0 ,v_i_0 ~*> tick ,v_j_0 ~*> v_j_0 ,v_j_0 ~*> 0.0.0 ,v_j_0 ~*> tick ,v_m ~*> v_j_0 ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> v_i_0 ,v_n ~*> v_j_0 ,v_n ~*> 0.0.0 ,v_n ~*> tick ,K ~*> v_i_0 ,K ~*> v_j_0 ,K ~*> 0.0.0 ,K ~*> tick ,v_i_0 ~^> v_j_0 ,v_i_0 ~^> 0.0.0 ,v_i_0 ~^> tick ,v_n ~^> v_j_0 ,v_n ~^> 0.0.0 ,v_n ~^> tick ,K ~^> v_j_0 ,K ~^> 0.0.0 ,K ~^> tick] eval_speedpldi3_bb2_in.12> [K ~=> v_j_0 ,v_i_0 ~+> v_i_0 ,v_i_0 ~+> 0.0 ,v_i_0 ~+> tick ,v_j_0 ~+> v_j_0 ,v_j_0 ~+> 0.0.0 ,v_j_0 ~+> tick ,v_m ~+> v_j_0 ,v_m ~+> 0.0.0 ,v_m ~+> tick ,v_n ~+> 0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> v_i_0 ,K ~+> v_j_0 ,K ~+> 0.0 ,K ~+> 0.0.0 ,K ~+> tick ,v_i_0 ~*> v_i_0 ,v_i_0 ~*> v_j_0 ,v_i_0 ~*> tick ,v_j_0 ~*> v_j_0 ,v_j_0 ~*> 0.0.0 ,v_j_0 ~*> tick ,v_m ~*> v_j_0 ,v_m ~*> 0.0.0 ,v_m ~*> tick ,v_n ~*> v_i_0 ,v_n ~*> v_j_0 ,v_n ~*> tick ,K ~*> v_i_0 ,K ~*> v_j_0 ,K ~*> 0.0.0 ,K ~*> tick ,v_i_0 ~^> v_j_0 ,v_n ~^> v_j_0 ,K ~^> v_j_0] + eval_speedpldi3_bb2_in.9> [v_j_0 ~+> v_j_0 ,v_j_0 ~+> 0.0.0 ,v_j_0 ~+> tick ,v_m ~+> v_j_0 ,v_m ~+> 0.0.0 ,v_m ~+> tick ,tick ~+> tick ,K ~+> 0.0.0 ,K ~+> tick ,v_j_0 ~*> v_j_0 ,v_m ~*> v_j_0 ,K ~*> v_j_0] eval_speedpldi3_bb1_in.7> [v_j_0 ~+> v_j_0 ,v_j_0 ~+> 0.0.0 ,v_j_0 ~+> tick ,v_m ~+> v_j_0 ,v_m ~+> 0.0.0 ,v_m ~+> tick ,tick ~+> tick ,K ~+> 0.0.0 ,K ~+> tick ,v_j_0 ~*> v_j_0 ,v_m ~*> v_j_0 ,K ~*> v_j_0] YES(?,PRIMREC)