YES(?,O(n^1)) * Step 1: UnsatPaths WORST_CASE(?,O(n^1)) + Considered Problem: Rules: 0. eval_speedpldi2_start(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) True (1,1) 1. eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) True (?,1) 2. eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) True (?,1) 3. eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) True (?,1) 4. eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_n,0) [v_n >= 0 && -1 + v_m >= 0] (?,1) 5. eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [-1 >= v_n] (?,1) 6. eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [0 >= v_m] (?,1) 7. eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 (?,1) && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_v1_0 >= 0] 8. eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 (?,1) && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && 0 >= v_v1_0] 9. eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 (?,1) && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_m >= v_v2_0] 10. eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,0) [v_v2_0 >= 0 (?,1) && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && v_v2_0 >= v_m] 11. eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,-1 + v_v1_0,1 + v_v2_0) [-1 + v_m + -1*v_v2_0 >= 0 (?,1) && v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0] 12. eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) True (?,1) Signature: {(eval_speedpldi2_0,4) ;(eval_speedpldi2_1,4) ;(eval_speedpldi2_2,4) ;(eval_speedpldi2_bb0_in,4) ;(eval_speedpldi2_bb1_in,4) ;(eval_speedpldi2_bb2_in,4) ;(eval_speedpldi2_bb3_in,4) ;(eval_speedpldi2_bb4_in,4) ;(eval_speedpldi2_start,4) ;(eval_speedpldi2_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{7,8},5->{12},6->{12},7->{9,10},8->{12},9->{11},10->{7,8},11->{7,8} ,12->{}] + Applied Processor: UnsatPaths + Details: We remove following edges from the transition graph: [(10,8)] * Step 2: FromIts WORST_CASE(?,O(n^1)) + Considered Problem: Rules: 0. eval_speedpldi2_start(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) True (1,1) 1. eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) True (?,1) 2. eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) True (?,1) 3. eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) True (?,1) 4. eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_n,0) [v_n >= 0 && -1 + v_m >= 0] (?,1) 5. eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [-1 >= v_n] (?,1) 6. eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [0 >= v_m] (?,1) 7. eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 (?,1) && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_v1_0 >= 0] 8. eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 (?,1) && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && 0 >= v_v1_0] 9. eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 (?,1) && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_m >= v_v2_0] 10. eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,0) [v_v2_0 >= 0 (?,1) && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && v_v2_0 >= v_m] 11. eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,-1 + v_v1_0,1 + v_v2_0) [-1 + v_m + -1*v_v2_0 >= 0 (?,1) && v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0] 12. eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) True (?,1) Signature: {(eval_speedpldi2_0,4) ;(eval_speedpldi2_1,4) ;(eval_speedpldi2_2,4) ;(eval_speedpldi2_bb0_in,4) ;(eval_speedpldi2_bb1_in,4) ;(eval_speedpldi2_bb2_in,4) ;(eval_speedpldi2_bb3_in,4) ;(eval_speedpldi2_bb4_in,4) ;(eval_speedpldi2_start,4) ;(eval_speedpldi2_stop,4)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{7,8},5->{12},6->{12},7->{9,10},8->{12},9->{11},10->{7},11->{7,8} ,12->{}] + Applied Processor: FromIts + Details: () * Step 3: AddSinks WORST_CASE(?,O(n^1)) + Considered Problem: Rules: eval_speedpldi2_start(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_n,0) [v_n >= 0 && -1 + v_m >= 0] eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [-1 >= v_n] eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [0 >= v_m] eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_v1_0 >= 0] eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && 0 >= v_v1_0] eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_m >= v_v2_0] eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,0) [v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && v_v2_0 >= v_m] eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,-1 + v_v1_0,1 + v_v2_0) [-1 + v_m + -1*v_v2_0 >= 0 && v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0] eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) True Signature: {(eval_speedpldi2_0,4) ;(eval_speedpldi2_1,4) ;(eval_speedpldi2_2,4) ;(eval_speedpldi2_bb0_in,4) ;(eval_speedpldi2_bb1_in,4) ;(eval_speedpldi2_bb2_in,4) ;(eval_speedpldi2_bb3_in,4) ;(eval_speedpldi2_bb4_in,4) ;(eval_speedpldi2_start,4) ;(eval_speedpldi2_stop,4)} Rule Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{7,8},5->{12},6->{12},7->{9,10},8->{12},9->{11},10->{7},11->{7,8} ,12->{}] + Applied Processor: AddSinks + Details: () * Step 4: Decompose WORST_CASE(?,O(n^1)) + Considered Problem: Rules: eval_speedpldi2_start(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_n,0) [v_n >= 0 && -1 + v_m >= 0] eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [-1 >= v_n] eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [0 >= v_m] eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_v1_0 >= 0] eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && 0 >= v_v1_0] eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_m >= v_v2_0] eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,0) [v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && v_v2_0 >= v_m] eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,-1 + v_v1_0,1 + v_v2_0) [-1 + v_m + -1*v_v2_0 >= 0 && v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0] eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) -> exitus616(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) -> exitus616(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) -> exitus616(v_m,v_n,v_v1_0,v_v2_0) True Signature: {(eval_speedpldi2_0,4) ;(eval_speedpldi2_1,4) ;(eval_speedpldi2_2,4) ;(eval_speedpldi2_bb0_in,4) ;(eval_speedpldi2_bb1_in,4) ;(eval_speedpldi2_bb2_in,4) ;(eval_speedpldi2_bb3_in,4) ;(eval_speedpldi2_bb4_in,4) ;(eval_speedpldi2_start,4) ;(eval_speedpldi2_stop,4) ;(exitus616,4)} Rule Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{7,8},5->{12},6->{12},7->{9,10},8->{12},9->{11},10->{7},11->{7,8} ,12->{13,14,15}] + Applied Processor: Decompose Greedy + Details: We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] | `- p:[7,10,11,9] c: [7,9,10,11] * Step 5: AbstractSize WORST_CASE(?,O(n^1)) + Considered Problem: (Rules: eval_speedpldi2_start(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_n,0) [v_n >= 0 && -1 + v_m >= 0] eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [-1 >= v_n] eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [0 >= v_m] eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_v1_0 >= 0] eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && v_v1_0 + v_v2_0 >= 0 && v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && v_v1_0 >= 0 && v_n + v_v1_0 >= 0 && -1 + v_m + v_v1_0 >= 0 && v_n >= 0 && -1 + v_m + v_n >= 0 && -1 + v_m >= 0 && 0 >= v_v1_0] eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) [v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && -1 + v_m >= v_v2_0] eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,0) [v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0 && v_v2_0 >= v_m] eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,-1 + v_v1_0,1 + v_v2_0) [-1 + v_m + -1*v_v2_0 >= 0 && v_v2_0 >= 0 && -1 + v_v1_0 + v_v2_0 >= 0 && -1 + v_n + v_v2_0 >= 0 && -1 + v_m + v_v2_0 >= 0 && v_n + -1*v_v1_0 >= 0 && -1 + v_v1_0 >= 0 && -2 + v_n + v_v1_0 >= 0 && -2 + v_m + v_v1_0 >= 0 && -1 + v_n >= 0 && -2 + v_m + v_n >= 0 && -1 + v_m >= 0] eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) -> exitus616(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) -> exitus616(v_m,v_n,v_v1_0,v_v2_0) True eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0) -> exitus616(v_m,v_n,v_v1_0,v_v2_0) True Signature: {(eval_speedpldi2_0,4) ;(eval_speedpldi2_1,4) ;(eval_speedpldi2_2,4) ;(eval_speedpldi2_bb0_in,4) ;(eval_speedpldi2_bb1_in,4) ;(eval_speedpldi2_bb2_in,4) ;(eval_speedpldi2_bb3_in,4) ;(eval_speedpldi2_bb4_in,4) ;(eval_speedpldi2_start,4) ;(eval_speedpldi2_stop,4) ;(exitus616,4)} Rule Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{7,8},5->{12},6->{12},7->{9,10},8->{12},9->{11},10->{7},11->{7,8} ,12->{13,14,15}] ,We construct a looptree: P: [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] | `- p:[7,10,11,9] c: [7,9,10,11]) + Applied Processor: AbstractSize Minimize + Details: () * Step 6: AbstractFlow WORST_CASE(?,O(n^1)) + Considered Problem: Program: Domain: [v_m,v_n,v_v1_0,v_v2_0,0.0] eval_speedpldi2_start ~> eval_speedpldi2_bb0_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_bb0_in ~> eval_speedpldi2_0 [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_0 ~> eval_speedpldi2_1 [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_1 ~> eval_speedpldi2_2 [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_2 ~> eval_speedpldi2_bb1_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_n, v_v2_0 <= 0*K] eval_speedpldi2_2 ~> eval_speedpldi2_bb4_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_2 ~> eval_speedpldi2_bb4_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_bb1_in ~> eval_speedpldi2_bb2_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_bb1_in ~> eval_speedpldi2_bb4_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb3_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb1_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= 0*K] eval_speedpldi2_bb3_in ~> eval_speedpldi2_bb1_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_m] eval_speedpldi2_bb4_in ~> eval_speedpldi2_stop [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_stop ~> exitus616 [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_stop ~> exitus616 [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_stop ~> exitus616 [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] + Loop: [0.0 <= K + v_v1_0 + v_v2_0] eval_speedpldi2_bb1_in ~> eval_speedpldi2_bb2_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb1_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= 0*K] eval_speedpldi2_bb3_in ~> eval_speedpldi2_bb1_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_m] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb3_in [v_m <= v_m, v_n <= v_n, v_v1_0 <= v_v1_0, v_v2_0 <= v_v2_0] + Applied Processor: AbstractFlow + Details: () * Step 7: Lare WORST_CASE(?,O(n^1)) + Considered Problem: Program: Domain: [tick,huge,K,v_m,v_n,v_v1_0,v_v2_0,0.0] eval_speedpldi2_start ~> eval_speedpldi2_bb0_in [] eval_speedpldi2_bb0_in ~> eval_speedpldi2_0 [] eval_speedpldi2_0 ~> eval_speedpldi2_1 [] eval_speedpldi2_1 ~> eval_speedpldi2_2 [] eval_speedpldi2_2 ~> eval_speedpldi2_bb1_in [v_n ~=> v_v1_0,K ~=> v_v2_0] eval_speedpldi2_2 ~> eval_speedpldi2_bb4_in [] eval_speedpldi2_2 ~> eval_speedpldi2_bb4_in [] eval_speedpldi2_bb1_in ~> eval_speedpldi2_bb2_in [] eval_speedpldi2_bb1_in ~> eval_speedpldi2_bb4_in [] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb3_in [] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb1_in [K ~=> v_v2_0] eval_speedpldi2_bb3_in ~> eval_speedpldi2_bb1_in [v_m ~=> v_v2_0] eval_speedpldi2_bb4_in ~> eval_speedpldi2_stop [] eval_speedpldi2_stop ~> exitus616 [] eval_speedpldi2_stop ~> exitus616 [] eval_speedpldi2_stop ~> exitus616 [] + Loop: [v_v1_0 ~+> 0.0,v_v2_0 ~+> 0.0,K ~+> 0.0] eval_speedpldi2_bb1_in ~> eval_speedpldi2_bb2_in [] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb1_in [K ~=> v_v2_0] eval_speedpldi2_bb3_in ~> eval_speedpldi2_bb1_in [v_m ~=> v_v2_0] eval_speedpldi2_bb2_in ~> eval_speedpldi2_bb3_in [] + Applied Processor: Lare + Details: eval_speedpldi2_start ~> exitus616 [v_m ~=> v_v2_0 ,v_n ~=> v_v1_0 ,K ~=> v_v2_0 ,v_n ~+> 0.0 ,v_n ~+> tick ,tick ~+> tick ,K ~+> 0.0 ,K ~+> tick ,K ~*> 0.0 ,K ~*> tick] + eval_speedpldi2_bb1_in> [v_m ~=> v_v2_0 ,K ~=> v_v2_0 ,v_v1_0 ~+> 0.0 ,v_v1_0 ~+> tick ,v_v2_0 ~+> 0.0 ,v_v2_0 ~+> tick ,tick ~+> tick ,K ~+> 0.0 ,K ~+> tick] YES(?,O(n^1))