NO * Step 1: UnsatPaths NO + Considered Problem: Rules: 0. eval_speedpldi4_start(v_i_0,v_m,v_n) -> eval_speedpldi4_bb0_in(v_i_0,v_m,v_n) True (1,1) 1. eval_speedpldi4_bb0_in(v_i_0,v_m,v_n) -> eval_speedpldi4_0(v_i_0,v_m,v_n) True (?,1) 2. eval_speedpldi4_0(v_i_0,v_m,v_n) -> eval_speedpldi4_1(v_i_0,v_m,v_n) True (?,1) 3. eval_speedpldi4_1(v_i_0,v_m,v_n) -> eval_speedpldi4_2(v_i_0,v_m,v_n) True (?,1) 4. eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [0 >= v_m] (?,1) 5. eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [v_m >= v_n] (?,1) 6. eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(v_n,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] (?,1) 7. eval_speedpldi4_bb1_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) [-1 + v_i_0 >= 0] (?,1) 8. eval_speedpldi4_bb1_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [0 >= v_i_0] (?,1) 9. eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(-1 + v_i_0,v_m,v_n) [-1 + v_m >= v_i_0] (?,1) 10. eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(v_i_0 + -1*v_m,v_m,v_n) [v_i_0 >= v_m] (?,1) 11. eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) -> eval_speedpldi4_stop(v_i_0,v_m,v_n) True (?,1) Signature: {(eval_speedpldi4_0,3) ;(eval_speedpldi4_1,3) ;(eval_speedpldi4_2,3) ;(eval_speedpldi4_bb0_in,3) ;(eval_speedpldi4_bb1_in,3) ;(eval_speedpldi4_bb2_in,3) ;(eval_speedpldi4_bb3_in,3) ;(eval_speedpldi4_start,3) ;(eval_speedpldi4_stop,3)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{11},5->{11},6->{7,8},7->{9,10},8->{11},9->{7,8},10->{7,8},11->{}] + Applied Processor: UnsatPaths + Details: We remove following edges from the transition graph: [(6,8)] * Step 2: FromIts NO + Considered Problem: Rules: 0. eval_speedpldi4_start(v_i_0,v_m,v_n) -> eval_speedpldi4_bb0_in(v_i_0,v_m,v_n) True (1,1) 1. eval_speedpldi4_bb0_in(v_i_0,v_m,v_n) -> eval_speedpldi4_0(v_i_0,v_m,v_n) True (?,1) 2. eval_speedpldi4_0(v_i_0,v_m,v_n) -> eval_speedpldi4_1(v_i_0,v_m,v_n) True (?,1) 3. eval_speedpldi4_1(v_i_0,v_m,v_n) -> eval_speedpldi4_2(v_i_0,v_m,v_n) True (?,1) 4. eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [0 >= v_m] (?,1) 5. eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [v_m >= v_n] (?,1) 6. eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(v_n,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] (?,1) 7. eval_speedpldi4_bb1_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) [-1 + v_i_0 >= 0] (?,1) 8. eval_speedpldi4_bb1_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [0 >= v_i_0] (?,1) 9. eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(-1 + v_i_0,v_m,v_n) [-1 + v_m >= v_i_0] (?,1) 10. eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(v_i_0 + -1*v_m,v_m,v_n) [v_i_0 >= v_m] (?,1) 11. eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) -> eval_speedpldi4_stop(v_i_0,v_m,v_n) True (?,1) Signature: {(eval_speedpldi4_0,3) ;(eval_speedpldi4_1,3) ;(eval_speedpldi4_2,3) ;(eval_speedpldi4_bb0_in,3) ;(eval_speedpldi4_bb1_in,3) ;(eval_speedpldi4_bb2_in,3) ;(eval_speedpldi4_bb3_in,3) ;(eval_speedpldi4_start,3) ;(eval_speedpldi4_stop,3)} Flow Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{11},5->{11},6->{7},7->{9,10},8->{11},9->{7,8},10->{7,8},11->{}] + Applied Processor: FromIts + Details: () * Step 3: CloseWith NO + Considered Problem: Rules: eval_speedpldi4_start(v_i_0,v_m,v_n) -> eval_speedpldi4_bb0_in(v_i_0,v_m,v_n) True eval_speedpldi4_bb0_in(v_i_0,v_m,v_n) -> eval_speedpldi4_0(v_i_0,v_m,v_n) True eval_speedpldi4_0(v_i_0,v_m,v_n) -> eval_speedpldi4_1(v_i_0,v_m,v_n) True eval_speedpldi4_1(v_i_0,v_m,v_n) -> eval_speedpldi4_2(v_i_0,v_m,v_n) True eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [0 >= v_m] eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [v_m >= v_n] eval_speedpldi4_2(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(v_n,v_m,v_n) [-1 + v_m >= 0 && -1 + v_n >= v_m] eval_speedpldi4_bb1_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) [-1 + v_i_0 >= 0] eval_speedpldi4_bb1_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) [0 >= v_i_0] eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(-1 + v_i_0,v_m,v_n) [-1 + v_m >= v_i_0] eval_speedpldi4_bb2_in(v_i_0,v_m,v_n) -> eval_speedpldi4_bb1_in(v_i_0 + -1*v_m,v_m,v_n) [v_i_0 >= v_m] eval_speedpldi4_bb3_in(v_i_0,v_m,v_n) -> eval_speedpldi4_stop(v_i_0,v_m,v_n) True Signature: {(eval_speedpldi4_0,3) ;(eval_speedpldi4_1,3) ;(eval_speedpldi4_2,3) ;(eval_speedpldi4_bb0_in,3) ;(eval_speedpldi4_bb1_in,3) ;(eval_speedpldi4_bb2_in,3) ;(eval_speedpldi4_bb3_in,3) ;(eval_speedpldi4_start,3) ;(eval_speedpldi4_stop,3)} Rule Graph: [0->{1},1->{2},2->{3},3->{4,5,6},4->{11},5->{11},6->{7},7->{9,10},8->{11},9->{7,8},10->{7,8},11->{}] + Applied Processor: CloseWith False + Details: () NO