NO
* Step 1: FromIts NO
    + Considered Problem:
        Rules:
          0.  eval_speedpldi2_start(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0)          True                        (1,1)
          1.  eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0)               True                        (?,1)
          2.  eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0)      -> eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0)               True                        (?,1)
          3.  eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0)      -> eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)               True                        (?,1)
          4.  eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)      -> eval_speedpldi2_bb1_in(v_m,v_n,v_n,0)                  [v_n >= 0 && -1 + v_m >= 0] (?,1)
          5.  eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)      -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0)          [-1 >= v_n]                 (?,1)
          6.  eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)      -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0)          [0 >= v_m]                  (?,1)
          7.  eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0)          [-1 + v_v1_0 >= 0]          (?,1)
          8.  eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0)          [0 >= v_v1_0]               (?,1)
          9.  eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0)          [-1 + v_m >= v_v2_0]        (?,1)
          10. eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,0)               [v_v2_0 >= v_m]             (?,1)
          11. eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_bb1_in(v_m,v_n,-1 + v_v1_0,1 + v_v2_0) True                        (?,1)
          12. eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0) -> eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0)            True                        (?,1)
        Signature:
          {(eval_speedpldi2_0,4)
          ;(eval_speedpldi2_1,4)
          ;(eval_speedpldi2_2,4)
          ;(eval_speedpldi2_bb0_in,4)
          ;(eval_speedpldi2_bb1_in,4)
          ;(eval_speedpldi2_bb2_in,4)
          ;(eval_speedpldi2_bb3_in,4)
          ;(eval_speedpldi2_bb4_in,4)
          ;(eval_speedpldi2_start,4)
          ;(eval_speedpldi2_stop,4)}
        Flow Graph:
          [0->{1},1->{2},2->{3},3->{4,5,6},4->{7,8},5->{12},6->{12},7->{9,10},8->{12},9->{11},10->{7,8},11->{7,8}
          ,12->{}]
        
    + Applied Processor:
        FromIts
    + Details:
        ()
* Step 2: CloseWith NO
    + Considered Problem:
        Rules:
          eval_speedpldi2_start(v_m,v_n,v_v1_0,v_v2_0)   -> eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0)           
          True
          eval_speedpldi2_bb0_in(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0)                
          True
          eval_speedpldi2_0(v_m,v_n,v_v1_0,v_v2_0)       -> eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0)                
          True
          eval_speedpldi2_1(v_m,v_n,v_v1_0,v_v2_0)       -> eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)                
          True
          eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)       -> eval_speedpldi2_bb1_in(v_m,v_n,v_n,0)                   
          [v_n >= 0 && -1 + v_m >= 0]
          eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)       -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0)           
          [-1 >= v_n]
          eval_speedpldi2_2(v_m,v_n,v_v1_0,v_v2_0)       -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0)           
          [0 >= v_m]
          eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0)           
          [-1 + v_v1_0 >= 0]
          eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0)           
          [0 >= v_v1_0]
          eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0)           
          [-1 + v_m >= v_v2_0]
          eval_speedpldi2_bb2_in(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_bb1_in(v_m,v_n,v_v1_0,0)                
          [v_v2_0 >= v_m]
          eval_speedpldi2_bb3_in(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_bb1_in(v_m,v_n,-1 + v_v1_0,1 + v_v2_0)  
          True
          eval_speedpldi2_bb4_in(v_m,v_n,v_v1_0,v_v2_0)  -> eval_speedpldi2_stop(v_m,v_n,v_v1_0,v_v2_0)             
          True
        Signature:
          {(eval_speedpldi2_0,4)
          ;(eval_speedpldi2_1,4)
          ;(eval_speedpldi2_2,4)
          ;(eval_speedpldi2_bb0_in,4)
          ;(eval_speedpldi2_bb1_in,4)
          ;(eval_speedpldi2_bb2_in,4)
          ;(eval_speedpldi2_bb3_in,4)
          ;(eval_speedpldi2_bb4_in,4)
          ;(eval_speedpldi2_start,4)
          ;(eval_speedpldi2_stop,4)}
        Rule Graph:
          [0->{1},1->{2},2->{3},3->{4,5,6},4->{7,8},5->{12},6->{12},7->{9,10},8->{12},9->{11},10->{7,8},11->{7,8}
          ,12->{}]
    + Applied Processor:
        CloseWith False
    + Details:
        ()

NO